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ADE5166 数据表(PDF) 115 Page - Analog Devices |
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ADE5166 数据表(HTML) 115 Page - Analog Devices |
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115 / 148 page  Preliminary Technical Data ADE5166/ADE5169/ADE5566/ADE5569 Rev. PrB | Page 115 of 148 Table 121. RTC Pointer Address SFR (RTCPTR, 0xA3) Bit Mnemonic Default Description 7 RTCW_RB 0 Read/write selection. RTCW_RB Results 0 The RTC register at the address is read into the RTCDAT SFR. 1 The data in the RTCDAT SFR is written in the RTC register at the address. This operation is completed only if the KEYREG SFR is set to 0xEA, the instruction before writing to the RTCDAT SFR. 6 to 5 Reserved N/A Reserved. 4 to 0 RTC_ADDRESS 0 Target address for read/write operation. Table 122. RTC Pointer Data SFR (RTCDAT, 0xA4) Bit Mnemonic Default Description 7 to 0 RTC_DATA 0 Location of data for read/write RTC operation. Table 123. RTC Nominal Compensation SFR (RTCCOMP, 0xF6) Bit Mnemonic Default Description 7 to 0 RTCCOMP 0 The RTCCOMP SFR holds the nominal RTC compensation value at 25°C. Note that this register is reset after a watchdog reset, an external reset or a power on reset (POR). Table 124. RTC Temperature Compensation SFR (TEMPCAL, 0xF7) Bit Mnemonic Default Description 7 to 0 TEMPCAL 0 The TEMPCAL SFR is adjusted based on the temperature read in the TEMPADC to calibrate the RTC over temperature. This allows the external crystal shift to be compensated over temperature. Note that this register is reset after a watchdog reset, an external reset or a power-on reset (POR). Table 125. Key SFR (KYREG, 0xC1) Bit Mnemonic Default Description 7 to 0 KYREG 0 To unlock the POWCON SFR and enable a write operation, 0xA7 should be written to KYREG. To unlock the HTHSEC, SEC, MIN or HOUR timekeeping registers or the RTCCAL, XTALOS, XTALG1 or XTALG2 registers and enable a write operation, 0xEA should be written to KYREG. |
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