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ADE5166 数据表(PDF) 127 Page - Analog Devices |
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ADE5166 数据表(HTML) 127 Page - Analog Devices |
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127 / 148 page  Preliminary Technical Data ADE5166/ADE5169/ADE5566/ADE5569 Rev. PrB | Page 127 of 148 SBAUDF is the fractional divider ratio required to achieve the required baud rate. The appropriate value for SBAUDF can be calculated with the following formula: ⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎝ ⎛ − × × × = + 1 2 16 64 Rate Baud f SBAUDF SBTH DIV CORE Note that SBAUDF should be rounded to the nearest integer. After the values for DIV and SBAUDF are calculated, the actual baud rate can be calculated with the following formula: ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ + × × = + 64 1 2 16 SBAUDF f Rate Baud Actual SBTH DIV CORE For example, to obtain a baud rate of 9600 bps while operating at a core clock frequency of 4.096 MHz and with the PLL CD bits equal to 0, () 4 74 . 4 2 log 9600 16 4,096,000 log = = ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ × = + SBTH DIV Note that the DIV result is rounded down. 0x2B 67 . 42 1 9600 2 16 000 , 096 , 4 64 3 = = ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ − × × × = SBAUDF Thus, the actual baud rate is 9570 bps, resulting in a 0.31% error. UART ADDITIONAL FEATURES Enhanced Error Checking The extended UART provides frame error, break error, and overwrite error detection. Framing errors occur when a stop bit is not present at the end of the frame. A missing stop bit implies that the data in the frame may not have been received properly. Break error detection indicates whether the Rx line has been low for longer than a 9-bit frame. It indicates that the data just received, a 0 or null character, is not valid because the master has disconnected. Overwrite error detection indicates when the received data has not been read fast enough and, as a result, a byte of data has been lost. The 8052 standard UART offers frame-error checking for an 8-bit UART through the SM2 and RB8 bits. Setting the SM2 bit prevents frames without a stop bit from being received. The stop bit is latched into the RB8 bit in the serial communications control SFR (SCON, 0x98). This bit can be examined to determine if a valid frame was received. The 8052 does not, however, provide frame error checking for a 9-bit UART. This enhanced error checking functionality is available through the frame error bit, FE, in the enhanced serial baud rate control SFR (SBAUDT, 0x9E). The FE bit is set on framing errors for both 8-bit and 9-bit UARTs. Rx RI FE EXTEN = 1 D7 D6 D5 D4 D3 D2 D1 D0 STOP START Figure 86. UART Timing in Mode 1 D7 D6 D5 D4 D3 D2 D1 D0 D8 STOP START Rx RI FE EXTEN = 1 Figure 87. UART Timing in Mode 2 and Mode 3 The 8052 standard UART does not provide break error detection. However, for an 8-bit UART, a break error can be detected when the received character is 0, a null character, and when there is a no stop bit because the RB8 bit is low. Break error detection is not possible for a 9-bit 8052 UART because the stop bit is not recorded. The ADE5166/ADE5169/ADE5566/ADE5569 enhanced break error detection is available through the BE bit in the SBAUDT SFR. The 8052 standard UART prevents overwrite errors by not allowing a character to be received when the RI, receive interrupt flag, is set. However, it does not indicate if a character has been lost because the RI bit is set when the frame is received. The enhanced UART overwrite error detection provides this infor- mation. When the enhanced 8052 UART is enabled, a frame is received regardless of the state of the RI flag. If RI = 1 when a new byte is received, the byte in SCON is overwritten, and the overwrite error flag is set. The overwrite error flag is cleared when SBUF is read. The extended UART is enabled by setting the EXTEN bit in the configuration SFR (CFG, 0xAF). UART TxD Signal Modulation There is an internal 38 kHz signal that can be OR’ed with the UART transmit signal for use in remote control applications (see the 38 kHz Modulation section). One of the events that can wake the MCU from sleep mode is activity on the RxD pin (see the 3.3 V Peripherals and Wake-Up Events section). |
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