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ADE5166 数据表(PDF) 130 Page - Analog Devices |
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ADE5166 数据表(HTML) 130 Page - Analog Devices |
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130 / 148 page  ADE5166/ADE5169/ADE5566/ADE5569 Preliminary Technical Data Rev. PrB | Page 130 of 148 UART2 OPERATION MODE The UART2 has two operation modes where each data byte (LSB first) is preceded by a start bit (0), followed by a stop bit (1). Therefore, each frame consists of 10 bits transmitted on TxD2 or received on RxD2. The baud rate is set by a dedicated timer for baud rate generation, UART2 Timer, which has a fractional divisor to precisely generate any baud rate. Transmission is initiated by a write to SBUF2. Next, a stop bit (1) is loaded into the 9th bit position of the transmit shift register. The data is output bit-by-bit until the stop bit appears on TxD2 and the transmit interrupt flag (TI2) is automatically set as shown in Figure 88. TxD2 TI2 (SCON2.1) START BIT D0 D1 D2 D3 D4 D5 D6 D7 STOP BIT SET INTERRUPT (FOR EXAMPLE, READY FOR MORE DATA) Figure 88. 8-Bit Variable Baud Rate Reception is initiated when a 1-to-0 transition is detected on RxD2. Assuming that a valid start bit is detected, character reception continues. The eight data bits are clocked into the serial port shift register. All of the following conditions must be met at the time the final shift pulse is generated to receive a character: • If the extended UART is disabled (EXTEN = 0 in the CFG SFR), RI must be 0 to receive a character. This ensures that the data in the SBUF SFR is not overwritten if the last received character has not been read. • If frame error checking is enabled by setting SM2, the received stop bit must be set to receive a character. This ensures that every character received comes from a valid frame, with both a start bit and a stop bit. If any of these conditions are not met, the received frame is irretrievably lost, and the receive interrupt flag, RI2 is not set. If the received frame has met the preceding conditions, the following events occur: • The eight bits in the receive shift register are latched into SBUF2. • The receiver interrupt flag (RI2) is set. Transmission is initiated by any instruction that uses SBUF2 as a destination register. Reception is initiated by the incoming start bit if REN2 = 1. 9-Bit UART with Variable Baud Rate 9-bit mode is selected by setting EN-T8 in the serial communica- tions control SFR (SCON, 0x98). In this mode, the UART2 serial port operates in 9-bit mode with a variable baud rate. The baud rate is set by a dedicated timer for baud rate generation, UART2 Timer, which has a fractional divisor to precisely generate any baud rate (see the UART Timer Generated Baud Rates section). The operation of the 9-bit UART2 is the same as for 9-bit mode for the UART1. In both modes, transmission is initiated by any instruction that uses SBUF2 as a destination register. Reception is initiated in 8-bit mode when RI = 0 and REN = 1. Reception is initiated in the 9-bit mode by the incoming start bit if REN = 1. UART BAUD RATE GENERATION The baud rate is determined by the overflow rate of the dedicated baud rate generator, UART2 Timer, which has an integer and fractional divisor. UART Timer Generated Baud Rates The enhanced Serial Baud Rate Control 2 SFR (SBAUD2, 0xEE) is used to control UART2 Timer. SBAUD2 is the baud rate control SFR; it sets up the integer divider (DIV) and the extended divider (SBTH) for UART Timer. The desired value to write to the DIV[2:0] and SBTH[1:0] bits can be calculated using the following formula where fcore is defined in POWCON SFR. Note that the DIV value must be rounded down to the nearest integer. DIV2 + SBTH2 = () 2 log 16 log ⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎝ ⎛ × Rate Baud f core SBAUDF2is the fractional divider ratio required to achieve the required baud rate. The appropriate value for SBAUDF2 can be calculated with the following formula: SBAUDF2 = ⎟ ⎟ ⎠ ⎞ ⎜ ⎜ ⎝ ⎛ − × × × + 1 2 16 64 2 2 Rate Baud f SBTH DIV core Note that the SBAUDF2 can only take two values, 0x87 or 0xAB, by clearing or setting the SBF2 bit, respectively, in the SBAUD2 SFR. These values were chosen to provide an accurate baud rate for 300, 2400, 4800, 9600, 19200, 38400, 57600, and 115,200 bps. Once DIV2 and SBAUDF2 are calculated, the actual baud rate can be calculated with the following formula: Actual Baud Rate = ⎟ ⎠ ⎞ ⎜ ⎝ ⎛ + ⋅ × + 64 2 1 2 16 2 2 SBAUDF f SBTH DIV core |
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