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TUSB3200CPAH 数据表(PDF) 34 Page - Texas Instruments

部件名 TUSB3200CPAH
功能描述  USB Streaming Controller STC
PDF  93 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TUSB3200CPAH 数据表(HTML) 34 Page - Texas Instruments

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the USB endpoint data buffers and the CODEC port interface is controlled by one or more of the DMA channels.
Remember that each DMA channel can be assigned to one USB isochronous endpoint. The source and/or
destination of the command/status address and data values is the MCU.
The features of the CODEC port interface that can be configured are:
The mode of operation
The number of time slots per CODEC frame
The number of serial clock cycles for slot 0
The number of serial clock cycles for all slots other than slot 0
The number of valid data bits per audio data time slot
The time slots to be used for command/status address and data
The serial clock (CSCLK) frequency in relation to the CODEC master clock (MCLK) frequency
The source of the serial clock signal; internally generated or an input from the CODEC device
The source of the CODEC master clock signal used to generate the internal serial clock signal; internally
generated by the ACG or an input to the TUSB3200 device
The polarity, duration, and direction of the CODEC frame sync signal
The relationship between the CODEC frame sync signal and the serial clock signal
The relationship between the CODEC frame sync signal and the serial data signals
The relationship between the serial clock signal and the serial data signals
The use of zero padding or a 3-state level for unused time slots and/or bits
The byte ordering to be used
2.2.13.1 Audio CODEC (AC) ’97 1.0 Mode of Operation
In AC ’97 1.0 mode, the CODEC port interface can be configured as an AC link serial interface to the AC ’97 CODEC
device. Refer to the Audio CODEC ’97 Specification Revision 1.03 for additional information. The AC Link serial
interface is a time division multiplexed (TDM)
slot based serial interface that is used to transfer both audio data and
command/status data between the TUSB3200 IC and the CODEC device.
Table 2–3. Terminal Assignments for CODEC Port Interface AC ’97 1.0 Mode
TERMINAL
AC ’97 Version 1.0
NO.
NAME
MODE 2
35
CSYNC
SYNC
O
34
CSCLK
BIT_CLK
I
36
CDATO
SD_OUT
O
38
CDATI
SD_IN
I
39
CRESET
RESET
O
40
CSCHNE
NC
O
In this mode, the CODEC port interface is configured as a bi-directional full duplex serial interface with a fixed rate
of 48 kHz. Each 48-kHz frame is divided into 13 time slots, with the use of each time slot predefined by the Audio
CODEC ’97 Specification. Each time slot is 20 serial clock cycles in length except for time slot 0, which is only 16 serial
clock cycles. The serial clock, which is referred to as the BIT_CLK for AC ’97 modes, is set to 12.288 MHz. Based
on the length of each slot, there is a total of 256 serial clock cycles per frame at a frequency of 12.288 MHz. As a result
the frame frequency is 48 kHz. For the AC ’97 modes, the BIT_CLK is input to the TUSB3200 device from the CODEC.
The BIT_CLK is generated by the CODEC from the master clock (MCLK) input. The CODEC MCLK input, which can



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