TUSB3200CPAH datasheet(29/93 Pages) TI

29 / 93 page

2–13

NOTE: In double buffer mode for bulk in transactions, the UBM selects between the X and Y

buffer based on the value of the toggle bit. If the toggle bit is a 0, the UBM will read the data

packet from the X buffer. If the toggle bit is a 1, the UBM will read the data packet from the Y

buffer.

2.2.7.4 Isochronous Transfers

The TUSB3200 supports isochronous data transfers both to and from the host PC. Devices that need to send or

receive constant-rate data with a suitable USB bandwidth should use the isochronous transfer type. In endpoints 1

through 7 and out endpoints 1 through 7 can all be configured as isochronous endpoints.

The transfer of isochronous data on the USB requires the use of double buffering. The TUSB3200 provides an X buffer

and Y buffer for each isochronous endpoint.

Four DMA channels are also provided to support streaming isochronous data to/from the host PC to/from a CODEC.

For isochronous endpoints handled by the MCU, the DMA channels are not used.

2.2.7.4.1 Isochronous Out Transaction (host PC as source and CODEC as destination)

The steps to be followed for an isochronous out transaction are as follows:

MCU initializes one of the out endpoints as an out isochronous endpoint by programming the appropriate

USB endpoint configuration block. This entails programming the buffer size and the buffer base address

for both the X and Y buffers and the bytes per sample bits, setting the isochronous endpoint bit, enabling

the endpoint, and clearing the NACK bit.

The MCU initializes one of the four DMA channels to support the isochronous out endpoint by programming

the appropriate DMA configuration registers.

The host PC sends an out token packet followed by a data packet addressed to the out endpoint. The UBM

writes the data packet to the X (or Y) endpoint buffer, updates the sample count in the data count byte, and

sets the X (or Y) buffer NACK bit to a 1. Note that the number of audio samples and not the number of bytes

is written to the data count byte. Also, note that there is no endpoint interrupt generated for isochronous

endpoints. If a buffer overflow occurs, the UBM will set the overflow bit in the endpoint configuration byte.

The DMA channel reads the X (or Y) buffer data count byte to verify that the NACK bit is set and to obtain

the sample count in the new data packet. The DMA channel then clears the NACK bit and streams the data

to the CODEC port interface. Note that if a new data packet has not been received, the NACK bit will not

be set, and the DMA channel will not move any data to the CODEC port interface.

2.2.7.4.2 Isochronous Out Transaction (host PC as source and MCU as destination)

The steps to be followed for an isochronous out transaction are as follows:

MCU initializes one of the out endpoints as an out isochronous endpoint by programming the appropriate

USB endpoint configuration block. This entails programming the buffer size and the buffer base address

for both the X and Y buffers and the bytes per sample bits, setting the isochronous endpoint bit, enabling

the endpoint, and clearing the NACK bit.

The host PC sends an out token packet followed by a data packet addressed to the out endpoint. The UBM

writes the data packet to the X (or Y) endpoint buffer, updates the sample count in the data count byte, and

sets the X (or Y) buffer NACK bit to a 1. Note that the number of audio samples and not the number of bytes

is written to the data count byte. Also, note that there is not an endpoint interrupt generated for isochronous

endpoints. If a buffer overflow occurs, the UBM will set the overflow bit in the endpoint configuration byte.

After an SOF or PSOF interrupt, the MCU reads the USB frame number register and uses the least

significant bit (bit 0) value as the buffer select bit. If bit 0 is a 0 for the current USB frame, then the MCU should

access the Y buffer. If bit 0 is a 1 for the current USB frame, then the MCU should access the X buffer.

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