数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

TUSB3200CPAH 数据表(PDF) 57 Page - Texas Instruments

部件名 TUSB3200CPAH
功能描述  USB Streaming Controller STC
PDF  93 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TUSB3200CPAH 数据表(HTML) 57 Page - Texas Instruments

Back Button TUSB3200CPAH Datasheet HTML 53Page - Texas Instruments TUSB3200CPAH Datasheet HTML 54Page - Texas Instruments TUSB3200CPAH Datasheet HTML 55Page - Texas Instruments TUSB3200CPAH Datasheet HTML 56Page - Texas Instruments TUSB3200CPAH Datasheet HTML 57Page - Texas Instruments TUSB3200CPAH Datasheet HTML 58Page - Texas Instruments TUSB3200CPAH Datasheet HTML 59Page - Texas Instruments TUSB3200CPAH Datasheet HTML 60Page - Texas Instruments TUSB3200CPAH Datasheet HTML 61Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 57 / 93 page
background image
A–9
A.4.3.3 USB Out Endpoint – X Buffer Data Count Byte (OEPDCNTXx)
The USB out endpoint X buffer data count byte contains the 7-bit value used to specify the amount of data received
in a data packet from the host PC. The no acknowledge status bit is also contained in this byte.
Bit
7
6
5
4
3
2
1
0
Mnemonic
NACK
DCNTX6
DCNTX5
DCNTX4
DCNTX3
DCNTX2
DCNTX1
DCNTX0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
BIT
MNEMONIC
NAME
DESCRIPTION
7
NACK
No acknowledge
The no acknowledge status bit is set to a 1 by the UBM at the end of a successful
USB out transaction to this endpoint to indicate that the USB endpoint X buffer
contains a valid data packet and that the X buffer data count value is valid. For
control, interrupt, or bulk endpoints, when this bit is set to a 1, all subsequent
transactions to the endpoint will result in a NACK handshake response to the host
PC. Also for control, interrupt, and bulk endpoints, to enable this endpoint to receive
another data packet from the host PC, this bit must be cleared to a 0 by the MCU. For
isochronous endpoints, a NACK handshake response to the host PC is not allowed.
Therefore, the UBM ignores this bit in reference to receiving the next data packet.
However, the MCU or DMA should clear this bit before reading the data packet from
the buffer.
6:0
DCNTX(6:0)
X Buffer data count
The X buffer data count value is set by the UBM when a new data packet is written to
the X buffer for the out endpoint. The 7-bit value is set to the number of bytes in the
data packet for control, interrupt, or bulk endpoint transfers and is set to the number
of samples in the data packet for isochronous endpoint transfers. To determine the
number of samples in the data packet for isochronous transfers, the bytes per
sample value in the configuration byte is used. The data count value is read by the
MCU or DMA to obtain the data packet size.
A.4.3.4 USB Out Endpoint – X and Y Buffer Size Byte (OEPBSIZx)
The USB out endpoint X and Y buffer size byte contains the 8-bit value used to specify the size of the two data buffers
to be used for this endpoint.
Bit
7
6
5
4
3
2
1
0
Mnemonic
BSIZ7
BSIZ6
BSIZ5
BSIZ4
BSIZ3
BSIZ2
BSIZ1
BSIZ0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
BIT
MNEMONIC
NAME
DESCRIPTION
7:0
BSIZ(7:0)
Buffer size
The X and Y buffer size value is set by the MCU to program the size of the X and Y
data packet buffers. Both buffers are programmed to the same size based on this
value. This value should be in 8 byte units. For example, a value of 18h would result
in the size of the X and Y buffers each being set to 192 bytes.
A.4.3.5 USB Out Endpoint – X Buffer Base Address Byte (OEPBBAXx)
The USB out endpoint X buffer base address byte contains the 8-bit value used to specify the base memory location
for the X data buffer for a particular USB out endpoint.
Bit
7
6
5
4
3
2
1
0
Mnemonic
BBAX10
BBAX9
BBAX8
BBAX7
BBAX6
BBAX5
BBAX4
BBAX3
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
BIT
MNEMONIC
NAME
DESCRIPTION
7:0
BBAX(10:3)
X Buffer base address
The X buffer base address value is set by the MCU to program the base address
location in memory to be used for the X data buffer. A total of 11 bits is used to specify
the base address location. This byte specifies the most significant 8 bits of the
address. All 0s are used by the hardware for the three least significant bits.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com