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TUSB3200CPAH 数据表(PDF) 39 Page - Texas Instruments

部件名 TUSB3200CPAH
功能描述  USB Streaming Controller STC
PDF  93 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TUSB3200CPAH 数据表(HTML) 39 Page - Texas Instruments

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2–23
2.2.14.2 Single Byte Write
As shown is Figure 2-4, a single byte data write transfer begins with the master device transmitting a start condition
followed by the I2C device address and the read/write bit. The read/write bit determines the direction of the data
transfer. For a write data transfer, the read/write bit should be a 0. After receiving the correct I2C device address and
the read/write bit, the I2C slave device should respond with an acknowledge bit. Next, the TUSB3200 should transmit
the address byte or bytes corresponding to the I2C slave device internal memory address being accessed. After
receiving the address byte, the I2C slave device should again respond with an acknowledge bit. Next, the TUSB3200
device should transmit the data byte to be written to the memory address being accessed. After receiving the data
byte, the I2C slave device should again respond with an acknowledge bit. Finally, the TUSB3200 device should
transmit a stop condition to complete the single byte data write transfer.
A6
A5
A4
A3
A2
A1
A0
R/W ACK A7
A6
A5
A4
A3
A2
A1
A0
ACK
D7
D6
D5
D4
D3
D2
D1
D0 ACK
Start Condition
Stop
Condition
Acknowledge
Acknowledge
Acknowledge
I2C Device Address and
Read/Write Bit
Memory or Register Address
Data Byte
SDA
Figure 2–4. Single Byte Write Transfer
2.2.14.3 Multiple Byte Write
A multiple byte data write transfer is identical to a single byte data write transfer except that multiple data bytes are
transmitted by the TUSB3200 device to the I2C slave device as shown in Figure 2-5. After receiving each data byte,
the I2C slave device should respond with an acknowledge bit.
D7
D6
D1
D0 ACK
Stop
Condition
Acknowledge
I2C Device Address and
Read/Write Bit
Memory or Register Address
Last Data Byte
A6
A5
A1
A0
R/W ACK A7
A5
A1
A0 ACK D7
D6
D1
D0 ACK
Start Condition
Acknowledge
Acknowledge
Acknowledge
SDA
First Data Byte
A4
A3
A6
Other
Data Bytes
Figure 2–5. Multiple Byte Write Transfer
2.2.14.4 Single Byte Read
As shown in Figure 2-6, a single byte data read transfer begins with the TUSB3200 device transmitting a start
condition followed by the I2C device address and the read/write bit. For the data read transfer, both a write followed
by a read are actually done. Initially, a write is done to transfer the address byte or bytes of the internal memory
address to be read. As a result, the read/write bit should be a 0. After receiving the I2C device address and the
read/write bit, the I2C slave device should respond with an acknowledge bit. Also, after sending the internal memory
address byte or bytes, the TUSB3200 device should transmit another start condition followed by the I2C slave device
address and the read/write bit again. This time the read/write bit should be a 1 indicating a read transfer. After
receiving the I2C device address and the read/write bit the I2C slave device should again respond with an
acknowledge bit. Next, the I2C slave device should transmit the data byte from the memory address being read. After
receiving the data byte, the TUSB3200 device should transmit a not-acknowledge followed by a stop condition to
complete the single byte data read transfer.
A6
A5
A0 R/W ACK A7
A6
A5
A4
A0
ACK
A6
A5
A0
ACK
Start
Condition
Stop
Condition
Acknowledge
Acknowledge
Acknowledge
I2C Device Address and
Read/Write Bit
Memory or Register Address
Data Byte
SDA
D7
D6
D1
D0 ACK
I2C Device Address and
Read/Write Bit
Repeat Start Condition
Not
Acknowledge
R/W
A1
A1
Figure 2–6. Single Byte Read Transfer



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