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TUSB3200CPAH 数据表(PDF) 60 Page - Texas Instruments |
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TUSB3200CPAH 数据表(HTML) 60 Page - Texas Instruments |
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60 / 93 page  A–12 A.4.4.2 USB In Endpoint – Y Buffer Base Address Byte (IEPBBAYx) The USB in endpoint Y buffer base address byte contains the 8-bit value used to specify the base memory location for the Y data buffer for a particular USB in endpoint. Bit 7 6 5 4 3 2 1 0 Mnemonic BBAY10 BBAY9 BBAY8 BBAY7 BBAY6 BBAY5 BBAY4 BBAY3 Type R/W R/W R/W R/W R/W R/W R/W R/W BIT MNEMONIC NAME DESCRIPTION 7:0 BBAY(10:3) Y Buffer base address The Y buffer base address value is set by the MCU to program the base address location in memory to be used for the Y data buffer. A total of 11 bits is used to specify the base address location. This byte specifies the most significant 8 bits of the address. All 0s are used by the hardware for the three least significant bits. A.4.4.3 USB In Endpoint – X Buffer Data Count Byte (IEPDCNTXx) The USB in endpoint X buffer data count byte contains the 7-bit value used to specify the amount of data received in a data packet from the host PC. The no acknowledge status bit is also contained in this byte. Bit 7 6 5 4 3 2 1 0 Mnemonic NACK DCNTX6 DCNTX5 DCNTX4 DCNTX3 DCNTX2 DCNTX1 DCNTX0 Type R/W R/W R/W R/W R/W R/W R/W R/W BIT MNEMONIC NAME DESCRIPTION 7 NACK No acknowledge The no acknowledge status bit is set to a 1 by the UBM at the end of a successful USB in transaction to this endpoint to indicate that the USB endpoint X buffer is empty. For control, interrupt, or bulk endpoints, when this bit is set to a 1, all subsequent transactions to the endpoint will result in a NACK handshake response to the host PC. Also for control, interrupt, and bulk endpoints, to enable this endpoint to transmit another data packet to the host PC, this bit must be cleared to a 0 by the MCU. For isochronous endpoints, a NACK handshake response to the host PC is not allowed. Therefore, the UBM ignores this bit in reference to sending the next data packet. However, the MCU or DMA should clear this bit after writing a data packet to the buffer. 6:0 DCNTX(6:0) X Buffer data count The X buffer data count value is set by the MCU or DMA when a new data packet is written to the X buffer for the in endpoint. The 7-bit value is set to the number of bytes in the data packet for control, interrupt, or bulk endpoint transfers and is set to the number of samples in the data packet for isochronous endpoint transfers. To determine the number of samples in the data packet for isochronous transfers, the bytes per sample value in the configuration byte is used. A.4.4.4 USB In Endpoint – X and Y Buffer Size Byte (IEPBSIZx) The USB in endpoint X and Y buffer size byte contains the 8-bit value used to specify the size of the two data buffers to be used for this endpoint. Bit 7 6 5 4 3 2 1 0 Mnemonic BSIZ7 BSIZ6 BSIZ5 BSIZ4 BSIZ3 BSIZ2 BSIZ1 BSIZ0 Type R/W R/W R/W R/W R/W R/W R/W R/W BIT MNEMONIC NAME DESCRIPTION 7 BSIZ(7:0) Buffer size The X and Y buffer size value is set by the MCU to program the size of the X and Y data packet buffers. Both buffers are programmed to the same size based on this value. This value should be in 8 byte units. For example, a value of 18h would result in the size of the X and Y buffers each being set to 192 bytes. |
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