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TUSB3200CPAH 数据表(PDF) 25 Page - Texas Instruments

部件名 TUSB3200CPAH
功能描述  USB Streaming Controller STC
PDF  93 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TUSB3200CPAH 数据表(HTML) 25 Page - Texas Instruments

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2–9
Data Stage Transaction:(s): Note, there are NO data stage transactions for this type of transfer.
Status Stage Transaction:
1.
For in endpoint 0, the MCU updates the data count value to zero, sets the TOGGLE bit to 1, then clears the
NACK bit to a 0 to enable the data packet to be sent to the host PC. Note that for a status stage transaction
a null data packet with a DATA1 PID is sent to the host PC.
2.
The host PC sends an in token packet addressed to in endpoint 0. After receiving the in token, the UBM
transmits a null data packet to the host PC. If the data packet is received without errors by the host PC, then
an ACK handshake is returned. The UBM will then toggle the TOGGLE bit, set the NACK bit to a 1 and assert
the endpoint interrupt.
3.
If the NACK bit is set to a 1 when the in token packet is received, the UBM simply returns a NAK handshake
to the host PC. IF the STALL bit is set to a 1 when the in token packet is received, the UBM simply returns
a STALL handshake to the host PC. If no handshake packet is received from the host PC, then the UBM
prepares to retransmit the same data packet again.
2.2.7.1.3 Control Read Transfer (In Transfer)
The host PC uses a control read transfer to read data to the USB function. A control read transfer consists of a setup
stage transaction, at least one in data stage transaction and an out status stage transaction.
The steps to be followed for a control read transfer are as follows:
1.
MCU initializes in endpoint 0 and out endpoint 0 by programming the appropriate USB endpoint
configuration blocks. This entails programming the buffer size and buffer base address, selecting the buffer
mode, enabling the endpoint interrupt, initializing the TOGGLE bit, enabling the endpoint, and clearing the
NACK bit for both in endpoint 0 and out endpoint 0.
Setup Stage Transaction:
2.
The host PC sends a setup token packet followed by the setup data packet addressed to out endpoint 0.
If the data is received without an error then the UBM will write the data to the setup data packet buffer, set
the setup stage transaction (SETUP) bit to a 1 in the USB status register, return an ACK handshake to the
host PC and assert the setup stage transaction interrupt. Note that as long as the setup transaction (SETUP)
bit is set to a 1, the UBM will return a NAK handshake for any data stage or status stage transactions
regardless of the endpoint 0 NACK or STALL bit values.
3.
The MCU services the interrupt and reads the setup data packet fro the buffer then decodes the command.
If the command is not supported or valid, the MCU should set the STALL bit in the out endpoint 0
configuration byte and the in endpoint 0 configuration byte before clearing the setup stage transaction
(SETUP) bit. This will cause the device to return a STALL handshake for any data stage or status stage
transactions. After reading the data packet and decoding the command, the MCU should clear the interrupt,
which will automatically clear the setup stage transaction status bit. The MCU should also set the TOGGLE
bit in the in endpoint 0 configuration byte to a 1. For control read transfers, the PID used by the host for the
first in data packet will be a DATA1 PID.



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