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TNETX15VE 数据表(PDF) 102 Page - Texas Instruments |
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TNETX15VE 数据表(HTML) 102 Page - Texas Instruments |
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102 / 113 page  TNETX15VE VLAN-ENGINE ADDRESS-LOOKUP DEVICE SPWS028B – APRIL 1997 – REVISED SEPTEMBER 1997 102 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION Outputs are driven to a minimum high-logic level of 2.4 V and to a maximum low-logic level of 0.6 V. These levels are compatible with TTL devices. Output transition times are specified as follows: All transition times are measured at the point where the output signal crosses 1.3 V. The rise and fall times are not specified but are assumed to be those of standard TTL devices, which are typically 1.5 ns. 1.3 V test measurement The test-load circuit shown in Figure 27 represents the programmable load of the tester pin electronics that is used to verify timing parameters of the TNETX15VE output signals. OUTPUT TEST LOAD CL IOH VLOAD IOL Point Test Test Under Output Where: IOH = Refer to IOH in recommended operating conditions. IOL = Refer to IOL in recommended operating conditions. VLOAD = 1.5 V, typical CL = 25 pF, typical load-circuit capacitance Figure 27. Test and Load Circuit |
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