SIO1007 datasheet(36/108 Pages) MICROCHIP

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SIO1007

DS00002020A-page 36

 2005 - 2015 Microchip Technology Inc.

10.2.3

IRCC2.0 IRTX TRANSMIT PINS

The IRTX2 pin defaults to output, low on VCC POR and PCI Reset. This pin is not powered by VTR. This pin functions

as described below.

Following a VCC POR, the IRTX2 pins will be output and low. They will remain low until one of the following conditions

are met.

IRTX2 Pin (CR0A on page 63 bits [7:6]=01):

• This pin will remain low following a VCC POR until serial port 2 is enabled by setting the UART2 power down bit

(CR02, bit 7), at which time the pin will reflect the state of the IR transmit output of the IRCC block (if IR is enabled

through the IR Option Register for Serial Port 2).

The IRTX2 pin will be driven low whenever serial port 2 is disabled (UART2 power down bit is cleared).

Note that bits[7,6] of CR0A can be used to override this functionality of driving the IRTX2 pin low when UART2 is pow-

ered down. If these bit are set to '11', then the IRTX2 pin is high-z.

10.2.4

GENERATING IRCC2.0 INTERRUPT EVENTS

The IRCC2.0 block generates one type of interrupt event: a runtime event.

The runtime event (if enabled) may be reported as an SMI event or a Serial IRQ event.

The description of the “INT” that is used to generate a runtime event from the SCE block. The interrupt status and enable

bits in the IRCC2,0 block are defined in the IRCC 2.X Block Data Sheet (Contact Microchip, unpublished). If a runtime

event occurs bit[1] of the SMI_STS2 register at offset 09h of the Runtime register block will be set. If bit[1] of the

SMI_EN2 register is one and if SMI’s are enabled on the IO_SMI# pin an SMI event will be generated.

This runtime event can also be routed to the Serial IRQs. To enable Serial IRQs for the IRCC2.0 runtime events, soft-

ware must select an IRQ channel in the UART Interrupt Selection register. See CR28 on page 74.

FIGURE 10-1:

INFRARED INTERFACE BLOCK DIAGRAM

IrCC Block

RAW

ASK

IrDA

FIR

COM

OUT

MUX

COM

AUX

TX1

RX1

TX2

RX2

TX3

RX3

IR MODE

FAST

HPMODE

G.P. Data

Fast Bit

IRTX2

IRRX2

IR Mode

/IRRX3

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