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SIO1007 数据表(PDF) 41 Page - Microchip Technology

部件名 SIO1007
功能描述  LPC Super I/O LPC IrDA Hot Docking Chip with UART
PDF  108 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

SIO1007 数据表(HTML) 41 Page - Microchip Technology

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 2005 - 2015 Microchip Technology Inc.
DS00002020A-page 41
SIO1007
12.0
SERIAL IRQ
The SIO1007 supports the serial interrupt to transmit interrupt information to the host system. The serial interrupt
scheme adheres to the Serial IRQ Specification for PCI Systems, Version 6.0. The PCI_CLK, SER_IRQ and nCLKRUN
pins are used for this interface. The Serial IRQ/CLKRUN Enable bit D7 in CR29 activates the serial interrupt interface.
12.1
Timing Diagrams for SER_IRQ Cycle
a)
Start Frame timing with source sampled a low pulse on IRQ1
b)
Stop Frame Timing with Host using 17 SER_IRQ sampling period
Note:
H=Host Control; R=Recovery; T=Turn-Around; SL=Slave Control; S=Sample
1.
Start Frame pulse can be 4-8 clocks wide depending on the location of the device in the PCI bridge hierarchy in
a synchronous bridge design.
Note:
H=Host Control; R=Recovery; T=Turn-Around; S=Sample; I=Idle
1.
Stop pulse is 2 clocks wide for Quiet mode, 3 clocks wide for Continuous mode.
2.
There may be none, one or more Idle states during the Stop Frame.
3.
The next SER_IRQ cycle’s Start Frame pulse may or may not start immediately after the turn-around clock of
the Stop Frame.



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