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SIO1007 数据表(PDF) 46 Page - Microchip Technology |
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SIO1007 数据表(HTML) 46 Page - Microchip Technology |
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46 / 108 page ![]() SIO1007 DS00002020A-page 46 2005 - 2015 Microchip Technology Inc. Note 1: The signal “ANY IRQ CHANGE/DRQ ASSERTION” is the same as “CHANGE/ASSERTION” in Table 13-1. 2: The SIO1007 continually monitors the state of nCLKRUN to maintain the PCI Clock until an active “ANY IRQ CHANGE/DRQ ASSERTION” condition has been transferred to the host in a SER_IRQ/DMA cycle. For example, if “ANY IRQ CHANGE/DRQ ASSERTION” is asserted before nCLKRUN is de-asserted (not shown in Figure 13-2), the SIO1007 must assert nCLKRUN as needed until the SER_IRQ/DMA cycle has completed. FIGURE 13-1: NCLKRUN SYSTEM IMPLEMENTATION EXAMPLE FIGURE 13-2: CLOCK START ILLUSTRATION PCI CLOCK GENERATOR (Central Resource) MASTER TARGET SIO nCLKRUN PCI_CLK PCI_CLK CLKRUN# SIRQ_CLKRUN_EN ANY IRQ CHANGE/ DRQ ASSERTION 1,2 CLKRUN# DRIVEN BY SIO SIO STOPS DRIVING CLKRUN# 2 CLKS MIN. |
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