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数据搜索系统，热门电子元器件搜索 |
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GXM 数据表(PDF) 48 Page - National Semiconductor (TI) |
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GXM 数据表(HTML) 48 Page - National Semiconductor (TI) |
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48 / 244 page  www.national.com 48 Revision 3.1 Processor Programming (Continued) Table 3-10. Configuration Register Map Register (Index) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Control Registers CCR1 (C1h) RSVD SMAC USE_SMI RSVD CCR2 (C2h) USE_SUSP RSVD WT1 SUSP_HLT LOCK_NW RSVD CCR3 (C3h) LSS_34 LSS_23 LSS_12 MAPEN RSVD NMI_EN SMI_LOCK CCR4 (E8h) CPUID SMI_NEST RSVD DTE_EN MEM_BYP IORT2 IORT1 IORT0 CCR7 (EBh) RSVD NMI RSVD EMMX PCR (20h) LSSER RSVD Device ID Registers DIR0 (FEh) DID3 DID2 DID1 DID0 RSVD CLKMODE1 RSVD CLMODE0 DIR1 (FFh) SID3 SID2 SID1 SID0 RID3 RID2 RID1 RID0 SMM Base Header Address Registers SMAR0 (CDh) A31 A30 A29 A28 A27 A26 A25 A24 SMAR1 (CEh) A23 A22 A21 A20 A19 A18 A17 A16 SMAR2 (CFh) A15 A14 A13 A12 SIZE3 SIZE2 SIZE1 SIZE0 SMHR0 (B0h) A7 A6 A5 A4 A3 A2 A1 A0 SMHR1 (B1h) A15 A14 A13 A12 A11 A10 A9 A8 SMHR2 (B2h) A23 A22 A21 A20 A19 A18 A17 A16 SMHR3 (B3h) A31 A30 A29 A28 A27 A26 A26 A24 Graphics/VGA Related Registers GCR (B8h) RSVD Scratchpad Size Base Address Code VGACTL (B9h) RSVD Enable SMI for VGA memory B8000h to BFFFFh Enable SMI for VGA memory B0000h to B7FFFh Enable SMI for VGA memory A0000h to AFFFFh VGAM0 (BAh) VGA Mask Register Bits [7:0] VGAM1 (BBh) VGA Mask Register Bits [15:8] VGAM2 (BCh) VGA Mask Register Bits [23:16] VGAM3 (BDh) VGA Mask Register Bits [31:24] |
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