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GXM 数据表(PDF) 69 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 GXM
功能描述  Geode??GXm Processor Integrated x86 Solution with MMX Support
PDF  244 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

GXM 数据表(HTML) 69 Page - National Semiconductor (TI)

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Revision 3.1
69
www.national.com
Processor Programming (Continued)
3.7.5
Gate Descriptors
Four kinds of gate descriptors are used to provide protec-
tion during control transfers: call gates, trap gates, inter-
rupt gates and task gates. (For more information on
protection refer to Section 3.13 “Protection” on page 86.)
Call Gate Descriptor (CGD). Call gates are used to
define legal entry points to a procedure with a higher priv-
ilege level. The call gates are used by CALL and JUMP
instructions in much the same manner as code segment
descriptors. When the CPU decodes an instruction and
sees it refers to a call gate descriptor in the GDT table or a
LDT table, the call gate is used to point to another
descriptor in the table that defines the destination code
segment.
The following privilege levels are tested during the transfer
through the call gate:
• CPL = Current Privilege Level
• RPL = Segment Selector Field
• DPL = Descriptor Privilege Level in the call gate
descriptor.
• DPL = Descriptor Privilege Level in the destination
code segment.
The maximum value of the CPL and RPL must be equal
or less than the gate DPL. For a JMP instruction the desti-
nation DPL equals the CPL. For a CALL instruction the
destination DPL is less or equals the CPL.
Conforming Code Segments. Transfer to a procedure
with a higher privilege level can also be accomplished by
bypassing the use of call gates, if the requested proce-
dure is to be executed in a conforming code segment.
Conforming code segments have the C bit set in the
TYPE field in their descriptor.
The bit structure and definitions for gate descriptors are
showninTables3-24 and Table3-25onpage 69.
Table 3-24. Gate Descriptors
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8765
43210
Memory Offset +4
OFFSET[31:16]
P
DPL
0
TYPE
0
0
0
PARAMETERS
Memory Offset +0
SELECTOR[15:0]
OFFSET[15:0]
Table 3-25. Gate Descriptors Bit Definitions
Bit
Memory
Offset
Name
Description
31:16
+4
OFFSET
Offset: Offset used during a call gate to calculate the branch target.
15:0
+0
31:16
+0
SELECTOR
Segment Selector
15
+4
P
Segment Present
14:13
+4
DPL
Descriptor Privilege Level
11:8
+4
TYPE
Segment Type:
0100 = 16-bit call gate
1100 = 32-bit call gate
0101 = Task gate
1110 = 32-bit interrupt gate
0110 = 16-bit interrupt gate
1111 = 32-bit trap gate
0111 = 16-bit trap gate
4:0
+4
PARAMETERS
Parameters: Number of parameters to copy from the caller’s stack to the called proce-
dure’s stack.



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