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Revision 3.1

Processor Programming (Continued)

3.11 SYSTEM MANAGEMENT MODE

System Management Mode (SMM) is usually employed

for system power management or software-transparent

emulation of I/O peripherals. SMM mode is entered

through a hardware signal “System Management Inter-

rupt” (SMI# pin) that has a higher priority than any other

interrupt, including NMI. An SMM interrupt can also be

triggered from software using an SMINT instruction. Fol-

lowing an SMM interrupt, portions of the CPU state are

automatically saved, SMM mode is entered, and program

execution begins at the base of SMM address space (Fig-

ure 3-9).

The GXm processor extends System Management Mode

(SMM) to support the virtualization of many devices,

including VGA video. The SMM mechanism can be trig-

gered not only by I/O activity, but by access to selected

memory regions. For example, SMM interrupts are gener-

ated when VGA addresses are accessed. As will be

described, other SMM enhancements have reduced SMM

overhead and improved virtualization-software perfor-

mance

Figure 3-9. System Management Memory Address Space

FFFFFFFFh

00000000h

Non-SMM

SMM

Potential

SMM Address

Space

Physical

Memory Space

FFFFFFFFh

00000000h

4KB to 32MB

Physical Memory

4GB

Defined

SMM

Address

Space

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