GXM datasheet(91/244 Pages) NSC

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Integrated Functions

The Geode GXm processor integrates a memory control-

ler, graphics pipeline and display controller in a Unified

Memory Architecture (UMA). UMA simplifies system

designs and significantly reduces overall system costs

associated with high chip count, small footprint notebook

designs. Performance degradation in traditional UMA sys-

tems is reduced through the use of National Semiconduc-

tor’s Display Compression Technology (DCT).

Figure 4-1 shows the major functional blocks of the GXm

processor and how the internal bus interface unit operates

as the interface between the processor’s core units and

the integrated functions.

This section details how the integrated functions and inter-

nal bus interface unit operate and their respective regis-

ters.

Figure 4-1. Internal Block Diagram

Write-Back

Unit

FPU

Internal Bus Interface Unit

Graphics

Memory

Display

PCI

SDRAM Port

CS5530

PCI Bus

Integer

Cache Unit

Integrated

Functions

MMU

(CRT/LCD TFT)

X-Bus

Pipeline

Controller

C-Bus

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