EM357-RTR datasheet(54/241 Pages) SILABS

54 / 241 page

Rev 1.3

If the monitor mode is selected (nBOOTMODE is low after 512 clocks), the FIB monitor software begins execution.

In order to filter out inadvertent jumps into the monitor, the FIB monitor re-samples the nBOOTMODE signal after a

3 ms delay. If the signal is still low, then the device stays in monitor mode. If the signal is high, then monitor mode

is exited and the normal program begins execution. In summary, the nBOOTMODE signal must be held low for

4 ms in order to properly invoke the FIB monitor.

After nBOOTMODE has been sampled, PA5 is configured as a floating input like the other GPIO configurations.

The GPIO_BOOTMODE bit in the GPIO_DBGSTAT register captures the state of nBOOTMODE so that software

may act on this signal if required.

Note:

To avoid inadvertently asserting nBOOTMODE, PA5’s capacitive load may not exceed 250 pF.

7.6. GPIO Modes

7.6.1. Analog Mode

Analog mode enables analog functions, and disconnects a pin from the digital input and output logic. Only the

following GPIO pins have analog functions:



PA4, PA5, PB5, PB6, PB7, and PC1 can be analog inputs to the ADC.



PB0 can be an external analog voltage reference input to the ADC, or it can output the internal analog

voltage reference from the ADC. The Ember software selects an internal or external voltage reference.



PC6 and PC7 can connect to an optional 32.768 kHz crystal.

Note:

When an external timing source is required, a 32.768 kHz crystal is commonly connected to PC6 and PC7. Alternatively,

when PC7 is configured as a digital input, PC7 can accept a digital external clock input.

When configured in analog mode:



The output drivers are disabled.



The internal pull-up and pull-down resistors are disabled.



The Schmitt trigger input is connected to a high logic level.



Reading GPIO_PxIN returns a constant 1.

7.6.2. Input Mode

Input mode is used both for general purpose input and for on-chip peripheral inputs. Input floating mode disables

the internal pull-up and pull-down resistors, leaving the pin in a high-impedance state. Input pull-up or pull-down

mode enables either an internal pull-up or pull-down resistor based on the GPIO_PxOUT register. Setting a bit to 0

in GPIO_PxOUT enables the pull-down and setting a bit to 1 enables the pull up.

When configured in input mode:



The output drivers are disabled.



An internal pull-up or pull-down resistor may be activated depending on GPIO_PxCFGH/L and

GPIO_PxOUT.



The Schmitt trigger input is connected to the pin.



Reading GPIO_PxIN returns the input at the pin.



The input is also available to on-chip peripherals.

7.6.3. Output Mode

Output mode provides a general purpose output under direct software control. Regardless of whether an output is

configured as push-pull or open-drain, the GPIO’s bit in the GPIO_PxOUT register controls the output. The

GPIO_PxSET and GPIO_PxCLR registers can atomically set and clear bits within GPIO_PxOUT register. These

set and clear registers simplify software using the output port because they eliminate the need to disable interrupts

to perform an atomic read-modify-write operation of GPIO_PxOUT.

When configured in output mode:



The output drivers are enabled and are controlled by the value written to GPIO_PxOUT:



In open-drain mode: 0 activates the N-MOS current sink; 1 tri-states the pin.



In push-pull mode: 0 activates the N-MOS current sink; 1 activates the P-MOS current source.



The internal pull-up and pull-down resistors are disabled.

EM357-RTR 数据表(PDF) 54 Page - Silicon Laboratories

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