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EM357-RTR 数据表(PDF) 79 Page - Silicon Laboratories |
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EM357-RTR 数据表(HTML) 79 Page - Silicon Laboratories |
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79 / 241 page ![]() 79 Rev 1.3 8.3.5. Registers Note: Substitute “1” or “2” for “x” in the following detailed descriptions. SC1_DATA: Address: 0x4000C83C Reset: 0x0 SC2_DATA: Address: 0x4000C03C Reset: 0x0 Register 8.5. SCx_DATA SC1_DATA: Serial Data Register SC2_DATA: Serial Data Register Bit 31 30 29 28 27 26 25 24 Name 0 0 0 0 0 0 0 0 Bit 23 22 21 20 19 18 17 16 Name 0 0 0 0 0 0 0 0 Bit 15 14 13 12 11 10 9 8 Name 0 0 0 0 0 0 0 0 Bit 7 6 5 4 3 2 1 0 Name SC_DATA Bitname Bitfield Access Description SC_DATA [7:0] RW Transmit and receive data register. Writing to this register adds a byte to the transmit FIFO. Reading from this register takes the next byte from the receive FIFO and clears the overrun error bit if it was set. In UART mode (SC1 only), reading from this register loads the UART status register with the parity and frame error status of the next byte in the FIFO, and clears these bits if the FIFO is now empty. |
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