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PC87366 数据表(PDF) 128 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 PC87366
功能描述  128-Pin LPC SuperI/O with System Hardware Monitoring, MIDI and Game Ports
PDF  240 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

PC87366 数据表(HTML) 128 Page - National Semiconductor (TI)

Back Button PC87366 Datasheet HTML 124Page - National Semiconductor (TI) PC87366 Datasheet HTML 125Page - National Semiconductor (TI) PC87366 Datasheet HTML 126Page - National Semiconductor (TI) PC87366 Datasheet HTML 127Page - National Semiconductor (TI) PC87366 Datasheet HTML 128Page - National Semiconductor (TI) PC87366 Datasheet HTML 129Page - National Semiconductor (TI) PC87366 Datasheet HTML 130Page - National Semiconductor (TI) PC87366 Datasheet HTML 131Page - National Semiconductor (TI) PC87366 Datasheet HTML 132Page - National Semiconductor (TI) Next Button
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5.0 Fan Speed Monitor (Continued)
128
www.national.com
5.3.2
Fan Monitor Threshold Register (FMTHR)
This 8-bit register contains the programmable threshold for the fan. This threshold is the maximum number of clock cycles
between consecutive tachometer pulses (frequencies of 16, 8, 4 or 2 KHz). It represents the minimum fan speed permitted
in the system. If the period between consecutive tachometer pulses is greater than the threshold, an interrupt (if enabled) is
issued. After reset, the value of FMTHR is FFh.
This register should not be changed when the corresponding Fan Monitor Enable bit is set to 1 (enabled), since this may
cause unpredictable results.
Location:
Device specific
Type:
R/W
5.3.3
Fan Monitor Speed Register (FMSPR)
This read-only 8-bit register holds the speed reading, represented by number of clock cycles between consecutive tachom-
eter pulses. For details, refer to Section 5.2. When the Speed Ready bit of the FMCSR register is 1, FMSPR holds valid data
that has not yet been read.
It is cleared to 00h upon any of the following conditions:
q
System reset
q
Fan Monitor Enable bit is set to 0
q
Overflow bit is set to 1.
Location:
Device specific
Type:
RO
5.3.4
Fan Monitor Control and Status Register (FMCSR)
Location:
Device specific
Type:
Varies per bit
Bit
76543210
Name
Threshold Value
Reset
11111111
Bit
76543210
Name
Fan Speed Reading
Reset
00000000
Bit
76543210
Name
Reserved
Clock Select
Filter
Disable
Interrupt
Enable
Overflow
Over
Threshold
Speed
Ready
Reset
00100000



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