ADAU1772BCPZ-R7 datasheet(30/117 Pages) AD

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Data Sheet

ADAU1772

Rev. C | Page 29 of 116

THEORY OF OPERATION

The ADAU1772 is a low power audio codec with an optimized

audio processing core, making it ideal for noise cancelling

applications that require high quality audio, low power, small

size, and low latency. The four ADC and two DAC channels

each have an SNR of at least +96 dB and a THD + N of at least

−88 dB. The serial data port is compatible with I2S, left justified,

right justified, and TDM modes, with tristating for interfacing

to digital audio data. The operating voltage range is 1.8 V to

3.63 V, with an on-board regulator generating the internal

digital supply voltage. If desired, the regulator can be powered

down and the voltage can be supplied externally.

The input signal path includes flexible configurations that can

accept single-ended analog microphone inputs as well as up to

four digital microphone inputs. Two microphone bias pins provide

seamless interfacing to electret microphones. Each input signal

has its own programmable gain amplifier (PGA) for volume

adjustment.

The ADCs and DACs are high quality, 24-bit Σ-Δ converters

that operate at a selectable 192 kHz or 96 kHz sampling rate.

The ADCs have an optional high-pass filter with a cutoff

frequency of 1 Hz, 4 Hz, or 8 Hz. The ADCs and DACs also

include very fine-step digital volume controls.

The stereo DAC output is capable of differentially driving a

headphone earpiece speaker with 16 Ω impedance or higher.

One side of the differential output can be powered down if

single-ended operation is required. There is also the option to

change to line output mode when the output is lightly loaded.

The core has a reduced instruction set that optimizes this codec

for noise cancellation. The program and parameter RAMs can

be loaded with custom audio processing signal flow built using

the SigmaStudio™ graphical programming software from

Analog Devices, Inc. The values stored in the parameter RAM

control individual signal processing blocks. The ADAU1772 also

has a self-boot function that can be used to load the program

and parameter RAM along with the register settings on power-

up using an external EEPROM.

The SigmaStudio software is used to program and control the core

through the control port. Along with designing and tuning a signal

flow, the tools can be used to configure all of the ADAU1772

registers. The SigmaStudio graphical interface allows anyone with

digital or analog audio processing knowledge to easily design the

DSP signal flow and port it to a target application. The interface

also provides enough flexibility and programmability for an

experienced DSP programmer to have in-depth control of the

design. In SigmaStudio, the user can connect graphical blocks

(such as biquad filters, volume controls, and arithmetic operations),

compile the design, and load the program and parameter files into

the ADAU1772 memory through the control port. SigmaStudio

also allows the user to download the design to an external EEPROM

for self-boot operation. Signal processing blocks available in the

provided libraries include the following:

•

Single-precision biquad filters

•

Second order filters

•

Absolute value and two-input adder

•

Volume controls

•

Limiter

The ADAU1772 can generate its internal clocks from a wide range

of input clocks by using the on-board fractional PLL. The PLL

accepts inputs from 8 MHz to 27 MHz. For standalone operation,

the clock can be generated using the on-board crystal oscillator.

The ADAU1772 is provided in a small, 40-lead, 6 mm × 6 mm

LFCSP with an exposed bottom pad.

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