| 数据搜索系统,热门电子元器件搜索 |
|
ADAU1772BCPZ-R7 数据表(PDF) 63 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADAU1772BCPZ-R7 数据表(HTML) 63 Page - Analog Devices |
|
63 / 117 page ![]() ADAU1772 Data Sheet Rev. C | Page 62 of 116 CORE CHANNEL 0/CORE CHANNEL 1 INPUT SELECT REGISTER Address: 0x000F, Reset: 0x10, Name: CORE_IN_MUX_0_1 Table 44. Bit Descriptions for CORE_IN_MUX_0_1 Bits Bit Name Settings Description Reset Access [7:4] CORE_IN_MUX_SEL_1 Core Input Channel 1 source. 0x1 RW 0000 AIN0/DMIC0 0001 AIN1/DMIC1 0010 AIN2/DMIC2 0011 AIN3/DMIC3 0100 Reserved 0101 Reserved 0110 Reserved 0111 Reserved 1000 Reserved 1001 Reserved 1010 Reserved 1011 Reserved 1100 Input ASRC Channel 0 1101 Input ASRC Channel 1 [3:0] CORE_IN_MUX_SEL_0 Core Input Channel 0 source. 0x0 RW 0000 AIN0/DMIC0 0001 AIN1/DMIC1 0010 AIN2/DMIC2 0011 AIN3/DMIC3 0100 Reserved 0101 Reserved 0110 Reserved 0111 Reserved 1000 Reserved 1001 Reserved 1010 Reserved 1011 Reserved 1100 Input ASRC Channel 0 1101 Input ASRC Channel 1 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |