ADAU1772BCPZ-R7 datasheet(36/117 Pages) AD

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Data Sheet

ADAU1772

Rev. C | Page 35 of 116

OUTPUT SIGNAL PATHS

Data from the serial input port can be routed to the core either

directly or through a sample rate converter. Data can be routed

to the serial output port, the stereo DAC, and the stereo PDM

modulator.

The analog outputs of the ADAU1772 can be configured as

differential or single-ended outputs. The analog output pins are

capable of driving headphone or earpiece speakers. The line

outputs can drive a load of at least 10 kΩ or can be put into

headphone mode to drive headphones or earpiece speakers. The

analog output pins are biased at AVDD/2.

ANALOG OUTPUTS

Headphone Output

The output pins can be driven by either a line output driver or a

headphone driver by setting the HP_EN_L and HP_EN_R bits

in the headphone line output select register (Address 0x0043).

The headphone outputs can drive a load of at least 16 Ω.

Headphone Output Power-Up Sequencing

To prevent pops when turning on the headphone outputs, the

user must wait at least 6 ms to unmute these outputs after enabling

the headphone output using the HP_EN_x bits. Waiting 6 ms

allows an internal capacitor to charge before these outputs are

used. Figure 81 illustrates the headphone output power-up

sequencing.

Figure 81. Headphone Output Power-Up Timing

Ground-Centered Headphone Configuration

The headphone outputs can also be configured as ground-

centered outputs by connecting coupling capacitors in series

with the output pins. Ground-centered headphones should use

the AGND pin as the ground reference.

When the headphone outputs are configured in this manner,

the capacitors create a high-pass filter on the outputs. The

corner frequency of this filter, which has an attenuation of 3 dB

at this point, is calculated by the following formula:

f3dB = 1/(2π × R × C)

where :

R is the impedance of the headphones.

C is the capacitor value.

For a typical headphone impedance of 32 Ω and a 220 μF

capacitor, the corner frequency is 23 Hz.

Pop-and-Click Suppression

On power-up, the precharge circuitry is enabled on all four

analog output pins to suppress pops and clicks. After power-

up, the precharge circuitry can be put into a low power mode

using the HP_POP_DISx bits in the POP_SUPRRESS register

(Address 0x0029).

The precharge time depends on the value of the capacitor

connected to the CM pin and the RC time constant of the load

on the output pin. For a typical line output load, the precharge

time is between 2 ms and 3 ms. After this precharge time, the

HP_POP_DISx bit can be set to low power mode.

To avoid clicks and pops, all analog outputs that are in use should

be muted while changing any register settings that may affect the

signal path. These outputs can then be unmuted after the changes

have been made.

Line Outputs

The analog output pins (HPOUTLP/LOUTLP, HPOUTLN/

LOUTLN, HPOUTRP/LOUTRP, and HPOUTRN/LOUTRN)

can be used to drive both differential and single-ended loads. In

their default settings, these pins can drive typical line loads of

10 kΩ or greater.

When the line output pins are used in single-ended mode, the

HPOUTLP/LOUTLP and HPOUTRP/LOUTRP pins should be

used to output the signals, and the HPOUTLN/LOUTLN and

HPOUTRN/LOUTRN pins should be powered down.

DIGITAL-TO-ANALOG CONVERTERS

The ADAU1772 includes two 24-bit Σ-Δ digital-to-analog

converters (DACs).

DAC Full-Scale Level

The full-scale output from the DACs (0 dBFS) scales linearly with

AVDD. At AVDD = 3.3 V, the full-scale output level is 1.94 V rms

for a differential output or 0.97 V rms for a single-ended output.

Digital DAC Volume Control

The volume of each DAC can be digitally attenuated using the

DACx_VOLUME registers (Address 0x002F and Address 0x0030).

The volume can be set to be between 0 dB and −95.625 dB in

0.375 dB steps.

PDM OUTPUT

The ADAU1772 includes a 2-channel pulse density modulated

(PDM) modulator. The PDMOUT pin can be used to drive a PDM

input amplifier, such as the SSM2517 mono 2.4 W amplifier. Two

SSM2517 devices can be connected to the PDMOUT data stream

to enable a stereo output. The PDM output signal is clocked by the

CLKOUT pin output. The PDM output stream must be clocked

by this pin and not by a clock from another source, such as another

audio IC, even if the other clock is of the same frequency as

CLKOUT. The PDM output data is clipped at the −6 dB level to

prevent overdriving a connected amplifier like the SSM2517.

HP_EN_X

1 = HEADPHONE

HP_MUTE_R AND HP_MUTE_L

00 = UNMUTE

INTERNAL

PRECHARGE

6ms

USER

DEFINED

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