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ADAU1772BCPZ-R7 数据表(PDF) 62 Page - Analog Devices |
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ADAU1772BCPZ-R7 数据表(HTML) 62 Page - Analog Devices |
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62 / 117 page  Data Sheet ADAU1772 Rev. C | Page 61 of 116 Table 42. Bit Descriptions for DBREG1 Bits Bit Name Settings Description Reset Access [7:0] DBVAL1 DB Value Register 1 read. 0x00 R 00000000 −96 dB 00010000 −90 dB 00100000 −84 dB 00110000 −78 dB 11100000 −12 dB 11110000 −6 dB 11111111 −0.375 dB DB VALUE REGISTER 2 READ Address: 0x000E, Reset: 0x00, Name: DBREG2 The core can write data to this register, and the data is automatically converted to a level in dB. The most common usage is to determine the rms value of a signal by taking the absolute value, and then performing low-pass filtering and moving the result to the DBREG2 register. Table 43. Bit Descriptions for DBREG2 Bits Bit Name Settings Description Reset Access [7:0] DBVAL2 DB Value Register 2 read. 0x00 R 00000000 −96 dB 00010000 −90 dB 00100000 −84 dB 00110000 −78 dB 11100000 −12 dB 11110000 −6 dB 11111111 −0.375 dB |
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