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ADAU1772BCPZ-R7 数据表(PDF) 81 Page - Analog Devices |
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ADAU1772BCPZ-R7 数据表(HTML) 81 Page - Analog Devices |
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81 / 117 page  ADAU1772 Data Sheet Rev. C | Page 80 of 116 PGA CONTROL 0 REGISTER Address: 0x0023, Reset: 0x40, Name: PGA_CONTROL_0 This register controls the PGA connected to AIN0. Table 64. Bit Descriptions for PGA_CONTROL_0 Bits Bit Name Settings Description Reset Access 7 PGA_EN0 Select line or microphone input. Note that the PGA inverts the signal going through it. 0x0 RW 0 AIN0 used as a single-ended line input. PGA powered down. 1 AIN0 used as a single-ended microphone input. PGA powered up with slewing. 6 PGA_MUTE0 Enable PGA mute. When PGA is muted, PGA_GAIN0 is ignored. 0x1 RW 0 Unmuted 1 Muted [5:0] PGA_GAIN0 Set the gain of PGA0. 0x0 RW 000000 −12 dB 000001 −11.25 dB 010000 0 dB 111110 +34.5 dB 111111 +35.25 dB PGA CONTROL 1 REGISTER Address: 0x0024, Reset: 0x40, Name: PGA_CONTROL_1 This register controls the PGA connected to AIN1. |
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