ADAU1772BCPZ-R7 datasheet(34/117 Pages) AD

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Data Sheet

ADAU1772

Rev. C | Page 33 of 116

INPUT SIGNAL PATHS

There are four input paths, from either an ADC or a digital

microphone, that can be routed to the core. The input sources

(ADC or digital microphone) must be configured in pairs (for

example, 0 and 1, 2 and 3), but each channel can be routed

individually. The core inputs can also be sourced from a stereo

input ASRC.

ANALOG INPUTS

The ADAU1772 can accept both line level and microphone inputs.

Each of the four analog input channels can be configured in a

single-ended mode or a single-ended with PGA mode. There

are also inputs for up to four digital microphones. The analog

inputs are biased at AVDD/2. Unused input pins should be

connected to the CM pin or ac-coupled to ground.

Signal Polarity

Signals routed through the PGAs are inverted. As a result, signals

input through the PGA are output from the ADCs with a polarity

that is opposite that of the input. Single-ended inputs are not

inverted. The ADCs are noninverting.

Input Impedance

The input impedance of the analog inputs varies with the gain of

the PGA. This impedance ranges from 0.68 kΩ at the 35.25 dB

gain setting to 32.0 kΩ at the −12 dB setting. The input impedance

on each pin can be calculated as follows:

kΩ

)

(





Gain

where Gain is set by PGA_GAINx.

The optional 10 dB PGA boost set in PGA_x_BOOST does not

affect the input impedance. This is an alternative way of increasing

gain without decreasing input impedance; however, it causes some

degradation in performance.

Analog Microphone Inputs

For microphone signals, the ADAU1772 analog inputs can be

configured in single-ended with PGA mode.

The PGA settings are controlled in Register 0x0023 to Register

0x0026. The PGA is enabled by setting the PGA_ENx bits.

Connect the AINxREF pins to the CM pin and connect the

microphone signal to the inverting input of the PGAs (AINx),

as shown in Figure 78.

Figure 78. Single-Ended Microphone Configuration

Analog Line Inputs

Line level signals can be input on the AINx pins of the analog

inputs. Figure 79 shows a single-ended line input using the

AINx pins. The AINxREF pins should be tied to CM. When using

single-ended line input, the PGA should be disabled using the

PGA_ENx bits, and the corresponding PGA pop suppression

bit should be disabled using the POP_SUPPRESS register

(Address 0x0029).

Figure 79. Single-Ended Line Inputs

Precharging Input Capacitors

Precharge amplifiers are enabled by default to quickly charge

large series capacitors on the inputs and outputs. Precharging

these capacitors helps to prevent pops in the audio signal. The

precharge circuits are powered up by default on startup and can be

disabled in the POP_SUPPRESS register. The precharge amplifiers

are automatically disabled when the PGA or headphone amplifiers

are enabled. For unused PGAs and headphone outputs, these

precharge amplifiers should be disabled using the POP_SUPPRESS

series capacitors. The impedance looking into the pin is 500 Ω

in this mode. However, at startup, the impedance looking into

the pin is dominated by the time constant of the CM pin because

the precharge amplifiers reference the CM voltage.

Microphone Bias

The ADAU1772 includes two microphone bias outputs: MICBIAS0

and MICBIAS1. These pins provide a voltage reference for electret

analog microphones. The MICBIASx pins can also be used to

cleanly supply voltage to digital or analog MEMS microphones

with separate power supply pins. The MICBIASx voltage is set

in the microphone bias control register (Address 0x002D). Using

this register, either the MICBIAS0 or MICBIAS1 output can be

enabled and disabled. The gain options provide two possible

voltages: 0.65 × AVDD or 0.90 × AVDD.

Many applications require enabling only one of the two bias

outputs. The two bias outputs should both be enabled when many

microphones are used in the system or when the positioning of

the microphones on the PCB does not allow one pin to bias all

microphones.

MICROPHONE

PGA

–12dB TO

+35.25dB

ADAU1772

AINx

AINxREF

MICBIASx

2kΩ

ADAU1772

LINE INPUT 0

AIN0

LINE INPUT 1

AIN1

LINE INPUT 2

AIN2

LINE INPUT 3

AIN3

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