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ADAU1772BCPZ-R7 数据表(PDF) 91 Page - Analog Devices |
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ADAU1772BCPZ-R7 数据表(HTML) 91 Page - Analog Devices |
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91 / 117 page ![]() ADAU1772 Data Sheet Rev. C | Page 90 of 116 SERIAL PORT CONTROL 0 REGISTER Address: 0x0032, Reset: 0x00, Name: SAI_0 Using 16-bit serial I/O limits device performance. Table 79. Bit Descriptions for SAI_0 Bits Bit Name Settings Description Reset Access [7:6] SDATA_FMT Serial data format. 0x0 RW 00 TDM, I2S—data delayed from edge of LRCLK by 1 BCLK cycle 01 TDM, left justified—data synchronized to edge of LRCLK 10 Right justified, 24-bit data 11 Right justified, 16-bit data [5:4] SAI Serial port mode. 0x0 RW 00 Stereo (I2S, left justified, right justified) 01 TDM2 10 TDM4 11 TDM8 [3:0] SER_PORT_FS Sampling rate on the serial ports. 0x0 RW 0000 48 kHz 0001 8 kHz 0010 12 kHz 0011 16 kHz 0100 24 kHz 0101 32 kHz 0110 96 kHz 0111 192 kHz |
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