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ADAU1772BCPZ-R7 数据表(PDF) 56 Page - Analog Devices |
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ADAU1772BCPZ-R7 数据表(HTML) 56 Page - Analog Devices |
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56 / 117 page ![]() Data Sheet ADAU1772 Rev. C | Page 55 of 116 Table 33. Bit Descriptions for PLL_CTRL2 Bits Bit Name Settings Description Reset Access [7:0] N_MSB PLL numerator MSB. 0x00 RW PLL NUMERATOR LSB REGISTER Address: 0x0004, Reset: 0x00, Name: PLL_CTRL3 This register should only be written when PLL_EN = 0 in Register CLK_CONTROL. Table 34. Bit Descriptions for PLL_CTRL3 Bits Bit Name Settings Description Reset Access [7:0] N_LSB PLL numerator LSB. 0x00 RW PLL INTEGER SETTING REGISTER Address: 0x0005, Reset: 0x00, Name: PLL_CTRL4 This register should only be written when PLL_EN = 0 in Register CLK_CONTROL. Table 35. Bit Descriptions for PLL_CTRL4 Bits Bit Name Settings Description Reset Access [6:3] R PLL integer setting. 0x0 RW 0000 Reserved 0001 Reserved 0010 2 0011 3 0100 4 0101 5 0110 6 0111 7 1000 8 |
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