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ADAU1772BCPZ-R7 数据表(PDF) 53 Page - Analog Devices |
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ADAU1772BCPZ-R7 数据表(HTML) 53 Page - Analog Devices |
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53 / 117 page  ADAU1772 Data Sheet Rev. C | Page 52 of 116 Reg Name Bits Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset RW 0x003D MODE_MP5 [7:0] RESERVED MODE_MP5_VAL 0x00 RW 0x003E MODE_MP6 [7:0] RESERVED MODE_MP6_VAL 0x11 RW 0x003F PB_VOL_SET [7:0] PB_VOL_INIT_VAL HOLD 0x00 RW 0x0040 PB_VOL_CONV [7:0] GAINSTEP RAMPSPEED PB_VOL_CONV_VAL 0x87 RW 0x0041 DEBOUNCE_MODE [7:0] RESERVED DEBOUNCE 0x05 RW 0x0043 OP_STAGE_CTRL [7:0] RESERVED HP_EN_R HP_EN_L HP_PDN_R HP_PDN_L 0x0F RW 0x0044 DECIM_PWR_MODES [7:0] DEC_3_EN DEC_2_EN DEC_1_EN DEC_0_EN SINC_3_EN SINC_2_EN SINC_1_EN SINC_0_EN 0x00 RW 0x0045 INTERP_PWR_MODES [7:0] RESERVED MOD_1_EN MOD_0_EN INT_1_EN INT_0_EN 0x00 RW 0x0046 BIAS_CONTROL0 [7:0] HP_IBIAS AFE_IBIAS01 ADC_IBIAS23 ADC_IBIAS01 0x00 RW 0x0047 BIAS_CONTROL1 [7:0] RESERVED CBIAS_DIS AFE_IBIAS23 MIC_IBIAS DAC_IBIAS 0x00 RW 0x0048 PAD_CONTROL0 [7:0] RESERVED DMIC2_3_PU DMIC0_1_PU LRCLK_PU BCLK_PU ADC_SDATA1_ PU ADC_SDATA0_ PU DAC_SDATA_ PU 0x7F RW 0x0049 PAD_CONTROL1 [7:0] RESERVED SELFBOOT_PU SCL_PU SDA_PU ADDR1_PU ADDR0_PU 0x1F RW 0x004A PAD_CONTROL2 [7:0] RESERVED DMIC2_3_PD DMIC0_1_PD LRCLK_PD BCLK_PD ADC_SDATA1_ PD ADC_SDATA0_ PD DAC_SDATA_ PD 0x00 RW 0x004B PAD_CONTROL3 [7:0] RESERVED SELFBOOT_PD SCL_PD SDA_PD ADDR1_PD ADDR0_PD 0x00 RW 0x004C PAD_CONTROL4 [7:0] RESERVED RESERVED RESERVED LRCLK_DRV BCLK_DRV ADC_SDATA1_ DRV ADC_SDATA0_ DRV RESERVED 0x00 RW 0x004D PAD_CONTROL5 [7:0] RESERVED RESERVED SCL_DRV SDA_DRV RESERVED RESERVED 0x00 RW |
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