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ADAU1772BCPZ-R7 数据表(PDF) 94 Page - Analog Devices |
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ADAU1772BCPZ-R7 数据表(HTML) 94 Page - Analog Devices |
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94 / 117 page  Data Sheet ADAU1772 Rev. C | Page 93 of 116 PDM ENABLE REGISTER Address: 0x0036, Reset: 0x00, Name: PDM_OUT Table 82. Bit Descriptions for PDM_OUT Bits Bit Name Settings Description Reset Access 4 PDM_CTRL Enable the control pattern in the PDM data stream. 0x0 RW 0 Disabled 1 Enabled [3:2] PDM_CH Selects the channel on which the control patterns are written. These control bits should not be changed while the PDM channel is operating and transmitting audio. 0x0 RW 00 Both channels 01 Left channel 10 Right channel 11 Reserved [1:0] PDM_EN Enable PDM output on Pin PDMOUT. 0x0 RW 00 PDM disabled 01 PDM left signal in both PDM channels 10 PDM right signal in both PDM channels 11 PDM stereo |
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