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STM8S 数据表(PDF) 109 Page - STMicroelectronics |
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STM8S 数据表(HTML) 109 Page - STMicroelectronics |
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109 / 467 page ![]() DocID14587 Rev 14 109/467 RM0016 General purpose I/O ports (GPIO) 113 11.7 Input mode details 11.7.1 Alternate function input Some I/Os can be used as alternate function input. For example as the port may be used as the input capture input to a timer. Alternate function inputs are not selected automatically, you select them by writing to a control bit in the registers of the corresponding peripheral. For Alternate Function input, you should select floating or pull-up input configuration in the DDR and CR1 registers. 11.7.2 Interrupt capability Each I/O can be configured as an input with interrupt capability by setting the CR2x bit while the I/O is in input mode. In this configuration, a signal edge or level input on the I/O generates an interrupt request. Falling or rising edge sensitivity is programmed independently for each interrupt vector in the EXTI_CR[2:1] registers. External interrupt capability is only available if the port is configured in input mode. Interrupt masking Interrupts can be enabled/disabled individually by programming the corresponding bit in the configuration register (Px_CR2). At reset state, the interrupts are disabled. If a pin alternate function is TLI, use the Px_CR2 bit to enable/disable the TLI interrupt. The TLI interrupt is associated to a dedicated interrupt vector. 11.7.3 Analog channels Analog I/O channels can be selected by the ADC peripheral. The corresponding input and output stages are then automatically disabled. As mentioned in the next section, the input Schmitt trigger should be disabled in the ADC_TDR register when using the analog channels. Table 23. Recommended and non-recommended configurations for analog input DDR CR1 CR2 ADC_TDR Configuration Comments 00 0 1 Floating Input without interrupt, Schmitt trigger disabled Recommended analog input configuration 0 1 x x Input with pull-up enabled Not recommended for analog input when analog voltage is present since these configurations cause excess current flow on the input pin. Both input and output stages are disabled on ADC selected channel. 1 0 x x Output 1 1 x x Output |
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