ZUSBOPTSC01ZAC datasheet(184/402 Pages) ZILOG

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Serial Peripheral Interface

P R E L I M I N A R Y

PS024604-1005

Z8 Encore!® Motor Control Flash MCUs

Product Specification

162

SPISTATE - SPI State Machine

Defines the current state of the internal SPI State Machine.

SPI Baud Rate High and Low Byte Registers

The SPI Baud Rate High and Low Byte registers combine to form a 16-bit reload value,

BRG[15:0], for the SPI Baud Rate Generator. The SPI baud rate is calculated using the

following equation:

Minimum baud rate is obtained by setting BRG[15:0] to 0000h for a clock divisor value

of (2 X 65536 = 131072).

BRH = SPI Baud Rate High Byte

Most significant byte, BRG[15:8], of the SPI Baud Rate Generator’s reload value.

BRL = SPI Baud Rate Low Byte

Least significant byte, BRG[7:0], of the SPI Baud Rate Generator’s reload value.

SPI Baud Rate (bits/s) =

System Clock Frequency (Hz)

2 x BRG[15:0]

Table 89. SPI Baud Rate High Byte Register (SPIBRH)

BITS

FIELD

BRH

RESET

FFH

R/W

ADDR

F66H

Table 90. SPI Baud Rate Low Byte Register (SPIBRL)

BITS

FIELD

BRL

RESET

FFH

R/W

ADDR

F67H

ZUSBOPTSC01ZAC 数据表(PDF) 184 Page - Zilog, Inc.

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