Z8F021ASH020SC datasheet(147/276 Pages) ZILOG

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PS022815-0206

Analog-to-Digital Converter

Z8 Encore! XP® 4K Series

Product Specification

128

ADCDL—ADC Data Low Bits

These bits are the least significant five bits of the 13-bits of the ADC output. These bits are

undefined after a Reset.

Reserved—Must be undefined.

OVF—Overflow Status

0= A hardware overflow did not occur in the ADC for the current sample.

1= A hardware overflow did occur in the ADC for the current sample, therefore the cur-

rent sample is invalid.

ADC High Threshold Register

The ADC High Threshold (ADCTHH) register is used to set the trigger point above which

an ADC sample causes a CPU interrupt.

ADCTHH—ADC High Threshold

These bits are compared to the most significant 8 bits of the single-ended ADC value. If

the ADC value exceeds this, an interrupt is asserted. The alarm function is not available in

DIFFERENTIAL mode.

ADC Low Threshold Register

The ADC Low Threshold (ADCTLH) register is used to set the trigger point below which

an ADC sample causes a CPU interrupt.

ADCTLH—ADC Low Threshold

These bits are compared to the most significant 8 bits of the single-ended ADC value. If

Table 76. ADC High Threshold High Byte (ADCTHH)

BITS

FIELD

ADCTHH

RESET

R/W

R/WR/W

ADDR

F74H

Table 77. ADC Low Threshold High Byte (ADCTLH)

BITS

FIELD

ADCTLH

RESET

000

R/W

R/WR/W

ADDR

F76H

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