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Z8F021ASH020SC 数据表(PDF) 177 Page - Zilog, Inc. |
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Z8F021ASH020SC 数据表(HTML) 177 Page - Zilog, Inc. |
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177 / 276 page ![]() PS022815-0206 Flash Option Bits Z8 Encore! XP® 4K Series Product Specification 158 Watchdog Timer Calibration Data WDTCALH—Watchdog Timer Calibration High Byte The WDTCALH and WDTCALL bytes, when loaded into the watchdog timer reload reg- isters result in a one second timeout at room temperature and 3.3V supply voltage. To use the Watch-Dog Timer calibration, user code must load WDTU with 0x00, WDTH with WDTCALH and WDTL with WDTCALL. WDTCALL—Watchdog Timer Calibration Low Byte The WDTCALH and WDTCALL bytes, when loaded into the watchdog timer reload reg- isters result in a one second timeout at room temperature and 3.3V supply voltage. To use the watchdog timer calibration, user code must load WDTU with 0x00, WDTH with WDTCALH and WDTL with WDTCALL. 38 FE38 Negative Gain High Byte Differential 1x Buffered External 2.0V 39 FE39 Negative Gain Low Byte Differential 1x Buffered External 2.0V Table 98. Watchdog Calibration High Byte at 007EH (WDTCALH) BITS 7 6 5 4 3 2 1 0 FIELD WDTCALH RESET U U U UUU UU R/W R/WR/W R/WR/W R/WR/W R/WR/W ADDR Information Page Memory 007EH Note: U = Unchanged by Reset. R/W = Read/Write. Table 99. Watchdog Calibration Low Byte at 007FH (WDTCALL) BITS 7 6 5 4 3 2 1 0 FIELD WDTCALL RESET U U U UUU UU R/W R/WR/W R/WR/W R/WR/W R/WR/W ADDR Information Page Memory 007FH Note: U = Unchanged by Reset. R/W = Read/Write. Table 97. ADC Calibration Data Location (Continued) Info Page Address Memory Address Compensation Usage ADC Mode Reference Type |
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