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APR2/D 数据表(PDF) 1 Page - NXP Semiconductors |
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APR2/D 数据表(HTML) 1 Page - NXP Semiconductors |
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1 / 101 page  MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by: DSP56001A/D, Rev. 1 ©1997 MOTOROLA, INC. DSP56001A Product Preview 24-BIT DIGITAL SIGNAL PROCESSOR The DSP56001A is an MPU-style general purpose Digital Signal Processor (DSP) composed of an efficient 24-bit DSP core, program and data memories, various peripherals, and support circuitry. The DSP56000 core is fed by on-chip Program RAM, two independent data RAMs, and two data ROMs containing sine, A-law, and µ-law tables. The DSP56001A contains a Serial Communication Interface (SCI), a Synchronous Serial Interface (SSI), and a parallel Host Interface (HI). This combination of features, illustrated in Figure 1, makes the DSP56001A a cost-effective, high-performance solution for high-precision general purpose digital signal processing. The DSP56001A is intended as a replacement for the DSP56001. The DSP56002 should be considered for new designs. Figure 1 DSP56001A Block Diagram Program Memory 512 × 24 RAM 64 × 24 ROM (boot) Program Control Unit 24-bit 56000 DSP Core 6 Sync. Serial (SSI) or I/O 3 Serial Comm. (SCI) or I/O 15 Host Interface (HI) or I/O 16-bit Bus 24-bit Bus External Address Bus Switch External Data Bus Switch Bus Control Data ALU 24 × 24 + 56 → 56-bit MAC Two 56-bit Accumulators 2 IRQ PAB XAB YAB GDB PDB XDB YDB Address 16 Data 24 Control 7 Program Address Generator Program Decode Controller Interrupt Control X Data Memory 256 × 24 RAM 256 × 24 ROM (A-law/ µ-law) Y Data Memory 256 × 24 RAM 256 × 24 ROM (sine) Clock Generator 2 Address Generation Unit Internal Data Bus Switch AA0884 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
类似零件编号 - APR2/D |
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类似说明 - APR2/D |
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