M32CSLASH8B datasheet(38/406 Pages) RENESAS

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Under development

M32C/8B Group

3. Memory

Preliminary specification

Specifications in this manual are tentative and subject to change.

REJ09B0450-0050 Rev.0.50 Oct 31, 2008

Page 21 of 385

Memory

Figure 3.1 shows a memory map of the M32C/8B Group.

The M32C/8B Group has 16-Mbyte address space from addresses 000000h to FFFFFFh.

The internal ROM is allocated in lower addresses, beginning with address FFFFFFh. For example, a 256-Kbyte

internal ROM area is allocated in addresses FC0000h to FFFFFFh. The fixed interrupt vectors are allocated in

addresses FFFFDCh to FFFFFFh. They store the starting address of each interrupt routine. Refer to 11. Interrupts for

details.

The internal RAM is allocated higher addresses, beginning with address 000400h. For example, a 32-Kbyte internal

RAM area is allocated in addresses 000400h to 0083FFh. The internal RAM is used not only for storing data but for

the stacks when subroutines are called or when interrupt requests are acknowledged.

SFRs are allocated in addresses 000000h to 0003FFh. The peripheral function control registers such as for I/O ports,

A/D converters, serial interfaces, timers are allocated here. All blank spaces within SFRs are reserved and cannot be

accessed by users.

The special page vectors are allocated addresses FFFE00h to FFFFDBh. They are used for the JMPS instruction and

JSRS instruction. Refer to the Renesas publication M32C/80 Series Software Manual for details.

Figure 3.1

Memory Map

NOTES:

1. The space is used as the external space in memory expansion mode and microprocessor mode. It is reserved in single-chip mode.

2. The space is reserved in single-chip mode and memory expansion mode. It is used as the external space in microprocessor mode.

3. Additional two blocks of 4-Kbyte space are provided in the flash memory version to store data. This space is used in single-chip mode

and memory expansion mode. It is reserved in microprocessor mode.

4. This space is used as the internal ROM in single-chip mode and memory expansion mode. It is used as the external space in

microprocessor mode.

5. The watchdog timer interrupt, oscillation stop detection interrupt, and voltage monitor interrupt share the same vector.

000000h

000400h

XXXXXXh

00E000h

F00000h

YYYYYYh

FFFFFFh

FFFFDCh

FFFE00h

00FFFFh

Capacity

XXXXXXh

0083FFh

Internal RAM

32 Kbytes

Reset

Watchdog timer (5)

Address match

BRK instruction

Overflow

Undefined instruction

Special page

vector table

SFR

Internal RAM

Reserved

External space(1)

Reserved(2)

Internal ROM(4)

Internal ROM(3)

(Data space)

NMI

Capacity

YYYYYYh

Internal ROM

FE0000h

128 Kbytes

FC0000h

256 Kbytes

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