M32CSLASH8B datasheet(65/406 Pages) RENESAS

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Under development

M32C/8B Group

8. Bus

Preliminary specification

Specifications in this manual are tentative and subject to change.

REJ09B0450-0050 Rev.0.50 Oct 31, 2008

Page 48 of 385

Figure 8.2

Address Bus and Chip-Select Outputs (Separate Bus)

i = 0 to 3

j = 0 to 3, excluding i

k = 0 to 3

p = 0 to 3, excluding k

CS1 outputs an "L" signal while accessing the external space 0.

CS2 outputs an "L" signal while accessing the external space 1.

CS3 outputs an "L" signal while accessing the external space 2.

CS0 outputs an "L" signal while accessing the external space 3.

NOTE:

1. The above examples show the address bus and chip-select output in two consecutive bus cycles.

Depending on the combination, the chip-select signal can be more than two bus cycles.

When the MCU accesses the space i specified by the

same chip-select output in the next cycle after having

accessed the external space i, the address bus

changes but the chip-select output does not.

When the MCU does not access any spaces in the

next cycle after having accessed an external space

(no instruction prefetch is performed), neither

address bus nor chip-select signal changes.

Access the same

external space i

Access

external

space i

Data bus

Address bus

Chip-select: CSk

Data

Address

Data

Access

external

space

Data bus

Address bus

Chip-select: CSk

Data

Address

No accesss to

external space

Example 3:

After accessing the external space, the address bus

changes but the chip-select output does not.

Example 4:

After accessing an external space, neither address

bus nor chip-select signal changes.

When the MCU accesses the external space j

specified by another chip-select output in the next

cycle after having accessed the external space i, both

address bus and chip-select output change.

When the MCU accesses SFR or internal ROM/

RAM area in the next cycle after having accessed

an external space, the chip-select signal changes

but the address bus does not.

Access another

external space j

Access

external

space i

Data bus

Address bus

Chip-select: CSk

Chip-select: CSp

Data

Address

Data

Access

external

space

Data bus

Address bus

Chip-select: CSk

Data

Address

Access SFR,

internal ROM/

RAM

Example 1:

After accessing the external space, both address bus

and chip-select output change

Example 2:

After accessing an external space, the chip-select

output changes but the address bus does not.

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