M32CSLASH8B datasheet(58/406 Pages) RENESAS

58 / 406 page

Under development

M32C/8B Group

7. Processor Mode

Preliminary specification

Specifications in this manual are tentative and subject to change.

REJ09B0450-0050 Rev.0.50 Oct 31, 2008

Page 41 of 385

Figure 7.1

PM0 Register

b7 b6 b5 b4

Processor Mode Register 0(1)

Symbol

PM0

Address

0004h

Bit Symbol

Bit Name

PM00

After Reset

1000 0000b (CNVSS = “L”)

0000 0011b (CNVSS = “H”)

Function

Processor mode bits(2, 3)

PM01

b1 b0

0 0: Single-chip mode

0 1: Memory expansion mode

1 0: Do not set to this value

1 1: Microprocessor mode

PM02

R/W mode select bit

0: RD/BHE/WR

1: RD/WRH/WRL

PM03

Software reset bit

The MCU is reset when this bit is set to 1.

Read as 0.

PM04

PM05

Reserved bit

Set to 0

Multiplexed bus space

select bits(4)

b5 b4

0 0: Multiplexed bus is not used

0 1: Access the CS2 area using multiplexed bus

1 0: Access the CS1 area using multiplexed bus

1 1: Access all CS areas using multiplexed bus

−

(b6)

BCLK output function select bit

0: BCLK output (5)

1: No BCLK output

PM07

NOTES:

1. Set the PM0 register after the PRC1 bit in the PRCR register is set to 1 (write enable).

2. Bits PM01 and PM00 maintain values set before reset, even after software reset or watchdog timer reset has performed.

3. When using memory expansion mode or microprocessor mode, first set bits PM02, PM05 and PM04, and PM07 in the PM0

4. The PM05 and PM04 bits setting is enabled in memory expansion mode and microprocessor mode. Set these bits in the

combination with bits PM11 and PM10 in the PM 1 register. Do not set bits PM05 and PM04 to 11b in microprocessor mode since

the MCU starts up with the separate bus after reset. Refer to the Table “Multiplexed Bus Settings and Chip-Select Areas” in

the Bus chapter.

5. No BCLK is output in single-chip mode even if the PM07 bit is set to 0.

To output BCLK from P5_3 in memory expansion mode and microprocessor mode, set the PM07 bit to 0, bits CM01 and CM00 in

the CM0 register to “00b” (I/O port P5_3), and bits PM15 and PM14 in the PM1 register to 00b, 10b, or 11b.

M32C/8B 数据表(PDF) 58 Page - Renesas Technology Corp

M32C/8B 数据表(HTML) 58 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载