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M32C/8B 数据表(PDF) 68 Page - Renesas Technology Corp |
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M32C/8B 数据表(HTML) 68 Page - Renesas Technology Corp |
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68 / 406 page  Under development M32C/8B Group 8. Bus Preliminary specification Specifications in this manual are tentative and subject to change. REJ09B0450-0050 Rev.0.50 Oct 31, 2008 Page 51 of 385 Table 8.6 Software Wait State and Bus Cycle Space External Bus Status PM1 Register EWCRi Register (i=0 to 3) Bus Cycle PM13 Bit PM12 Bit Bits EWCRi4 to EWCRi0 SFR area − 0 −− 2 BCLK cycles 1 3 BCLK cycles Internal ROM/ RAM −− 0 − 1 BCLK cycle 1 2 BCLK cycles External memory Separate bus −− 00001b 2 BCLK cycles 00010b 3 BCLK cycles 00011b 4 BCLK cycles 00100b 5 BCLK cycles 00101b 6 BCLK cycles 00110b 7 BCLK cycles 01010b 4 BCLK cycles 01011b 5 BCLK cycles 01100b 6 BCLK cycles 10011b 6 BCLK cycles 10100b 7 BCLK cycles 10110b 9 BCLK cycles Multiplexed bus −− 01010b 4 BCLK cycles 01011b 5 BCLK cycles 01101b 7 BCLK cycles 10011b 6 BCLK cycles 10100b 7 BCLK cycles 10101b 8 BCLK cycles 10110b 9 BCLK cycles |
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