M32CSLASH8B datasheet(19/406 Pages) RENESAS

19 / 406 page

M32C/8B Group

1. Overview

REJ09B0450-0050 Rev.0.50 Oct 31, 2008

Page 2 of 385

Under development Preliminary specification

Specifications in this manual are tentative and subject to change.

Table 1.1

Specifications (144-Pin Package) (1/2)

NOTE:

1. Please contact a Renesas sales office to use optional features.

Item

Function

Specification

CPU

Central processing unit

M32C/80 core (multiplier: 16 bits × 16 bits

→ 32 bits,

multiply-addition operation instructions: 16 × 16 + 48

→ 48 bits)

• Basic instructions: 108

• Minimum instruction execution time:

31.3 ns (f(CPU) = 32 MHz / VCC1 = 3.0 to 5.5 V)

• Operating modes: Single-chip mode, memory expansion mode,

and microprocessor mode

Memory

ROM / RAM

Flash memory version: 256KB + 8KB/32 KB, 128KB + 8KB/32 KB

ROMless version

− / 32KB

Power Supply Voltage Detection

Voltage monitor interrupt (optional)(1)

External

Bus

Expansion

Bus / memory expansion

function

• Address space: 16 Mbyte

• External bus interface: 1 to 7 wait states can be inserted,

4 chip select outputs, 3 V and 5 V interfaces

• Bus format: Switchable between separate bus and multiplexed

bus formats, switchable data bus width (8-bit or 16-bit)

Clock

Clock generation circuits • 4 circuits:

Main clock, sub clock, on-chip oscillator,

PLL frequency synthesizer

• Oscillation stop detection:

Main clock oscillation stop detect function

• Frequency divider circuit:

Dividing ratio selectable among 1, 2, 3, 4, 6, 8, 10, 12, 14, 16

• Low power consumption features: Wait mode, stop mode

Interrupts

• Interrupt vectors: 70

• External interrupt inputs:

11 (NMI, INT × 6, Key input × 4)

Single-chip mode

Memory expansion and microprocessor mode with 8-bit external bus

8 (NMI, INT × 3, Key input × 4)

Memory expansion and microprocessor mode with 16-bit external bus

• Interrupt priority levels: 7

Watchdog Timer

15-bit × 1 (with prescaler)

DMA

DMAC

• 4 channels, cycle steal method

• Trigger sources: 31

• Transfer modes: 2 (single transfer and repeat transfer)

DMACII

• Can be activated by all peripheral function interrupt sources

• Transfer modes: 2 (single transfer and burst transfer)

• Immediate transfer, calculation transfer, and chain transfer

functions

Timer

Timer A

16-bit timer × 5

Timer mode, event counter mode, one-shot timer mode,

pulse width modulation (PWM) mode

Event counter 2-phase pulse signal processing (2-phase

encoder input) × 3

Timer B

16-bit timer × 6

Timer mode, event counter mode, pulse period measurement

mode, pulse width measurement mode

Timer function for

3-phase motor control

3-phase inverter control × 1 (using timer A1, timer A2, timer A4,

and timer B2)

On-chip dead time timer

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