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M32C/8B 数据表(PDF) 392 Page - Renesas Technology Corp |
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M32C/8B 数据表(HTML) 392 Page - Renesas Technology Corp |
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392 / 406 page ![]() Under development M32C/8B Group 25. Usage Notes Preliminary specification Specifications in this manual are tentative and subject to change. REJ09B0450-0050 Rev.0.50 Oct 31, 2008 Page 375 of 385 25.9.3 Timer B 25.9.3.1 Timer B (Timer Mode, Event Counter Mode) • The TBiS bit (i = 0 to 5) in the TABSR or TBSR register is set to 0 (count stops) after reset. Set the TBiS bit to 1 (count starts) after selecting timer operating mode and setting the TBi register. Bits TB2S to TB0S are bits 7 to 5 in the TABSR register. Bits TB5S to TB3S are bits 7 to 5 in the TBSR register. • The TBi register indicates a counter value while counting at any given time. However, FFFFh can be read in the reload timing. When the TBi register is set while a counter is stopped, the setting value can be read until a counter is started. 25.9.3.2 Timer B (Pulse Period/Pulse Width Measurement Mode) • To set the MR3 bit to 0 (no overflow has occurred), wait for one or more count source cycles to write to the TBiMR register after the MR3 bit becomes 1, while the TBiS bit is set to 1. (Technical update: TN-M16C-75-0110) • Use the IR bit in the TBiIC register to detect overflow. The MR3 bit is used only to determine an interrupt request source within the interrupt routine. • When the first valid edge is input after the count starts, an undefined value is transferred to the reload register. At this time, the timer Bi interrupt request is not generated. • The counter value is undefined when the count starts. Therefore, the MR3 bit may become 1 (overflow) and causes a timer Bi interrupt request to be generated before a valid edge is input. • The IR bit may become 1 (interrupt requested) by changing bits MR1 and MR0 in the TBiMR register after the count starts. If the same value is written to bits MR1 and MR0, the IR bit is not changed. • Pulse width is repeatedly measured in pulse width measurement mode. Determine by a program whether the measurement result is high (“H”) or low (“L”). • If an overflow and a valid edge input occur simultaneously in pulse period measurement mode, an interrupt request is generated only once, which results in the valid edge not being recognized. Do not let an overflow occur. • In pulse width measurement mode, determine whether an interrupt source is a valid edge input or an overflow by reading the port level in the TBi interrupt routine. |
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