M32CSLASH8B datasheet(162/406 Pages) RENESAS

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Under development

M32C/8B Group

15. Timer A

Preliminary specification

Specifications in this manual are tentative and subject to change.

REJ09B0450-0050 Rev.0.50 Oct 31, 2008

Page 145 of 385

Figure 15.5

TA0MR to TA4MR Registers in Timer Mode

b6 b5 b4

Symbol

TA0MR to TA4MR

Address

0356h, 0357h, 0358h, 0359h, 035Ah

After Reset

00h

Function

Bit Symbol

Bit Name

MR3

TCK1

Gate function select bits

MR2

MR1

Count source select bits

TCK0

Timer Ai Mode Register (i = 0 to 4)(Timer Mode)

TMOD1

Reserved bit

−

(b2)

b1 b0

0 0: Timer mode

Operating mode select bits

TMOD0

Set to 0

b4 b3

0 0:

Gate function disabled

0 1:

(TAiIN pin is a programmable I/O port)

1 0: Timer counts only while an "L" signal is input

to the TAiIN pin

1 1: Timer counts only while an "H" signal is

input to the TAiIN pin

Set to 0 in timer mode

b7 b6

0 0: f1

0 1: f8

1 0: f2n(1)

1 1: fC32

NOTE:

1. Bits CNT3 to CNT0 in the TCSPR register select no division (n = 0) or divided-by-2n (n = 1 to 15). To select f2n, set the

CST bit in the TCSPR register to 1 before setting bits TCK1 and TCK0 to 10b.

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