H8SSLASH2214 datasheet(348/936 Pages) RENESAS

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Section 9 I/O Ports

Rev.4.00 Sep. 18, 2008 Page 288 of 872

REJ09B0189-0400

9.2.3

Pin Functions

Port 1 pins also function as TPU I/O pins (TCLKA, TCLKB, TCLKC, TCLKD, TIOCA0,

TIOCB0, TIOCC0, TIOCD0, TIOCA1, TIOCB1, TIOCA2, and TIOCB2), external interrupt input

pins (

IRQ0 and IRQ1), and address output pins (A23 to A20). Port 1 pin functions are shown in

table 9.3.

Table 9.3

Port 1 Pin Functions

Pin Functions and Selection Method

P17/

TIOCB2/

TCLKD

The pin function is switched as shown below according to the combination of the TPU

channel 2 settings (bits MD3 to MD0 in TMDR2, bits IOB3 to IOB0 in TIOR2, and bits

CCLR1 and CCLR0 in TCR2), bits TPSC2 to TPSC0 in TCR0 and TCR5, and bit

P17DDR.

TPU channel 2

settings

(1)

in table below

(2)

in table below

P17DDR

—

Pin function

TIOCB2 output

P17 input

P17 output

TIOCB2 input*

TCLKD input*

Notes: 1. TIOCB2 input when MD3 to MD0 = B'0000 or B'01xx and IOB3 = 1.

2. TCLKD input when the setting for either TCR0 or TCR5 is: TPSC2 to

TPSC0 = B'111.

Also, TCLKD input when channels 2 and 4 are set to phase counting

mode.

TPU channel 2

settings

(2)

(1)

(2)

(1)

(2)

MD3 to MD0

B'0000, B'01xx

B'0010

B'0011

IOB3 to IOB0

B'0000

B'0100

B'1xxx

B'0001 to B'0011

B'0101 to B'0111

—

B'xx00

Other than B'xx00

CCLR1, CCLR0

—

Other than

B'10

Output function

—

Output compare

output

—

PWM mode 2

output

—

x: Don’t care

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