H8SSLASH2214 datasheet(48/936 Pages) RENESAS

48 / 936 page

Rev.4.00 Sep. 18, 2008 Page xlviii of lx

REJ09B0189-0400

Figure 8.6

Memory Mapping in Normal Mode ........................................................................ 269

Figure 8.7

Memory Mapping in Repeat Mode ......................................................................... 270

Figure 8.8

Memory Mapping in Block Transfer Mode ............................................................ 272

Figure 8.9

Chain Transfer Memory Map.................................................................................. 273

Figure 8.10 DTC Operation Timing (Example in Normal Mode or Repeat Mode) ................... 274

Figure 8.11 DTC Operation Timing

(Example of Block Transfer Mode, with Block Size of 2)...................................... 274

Figure 8.12 DTC Operation Timing (Example of Chain Transfer) ............................................ 275

Section 9 I/O Ports

Figure 9.1

Port 1 Pin Functions ................................................................................................ 285

Figure 9.2

Port 3 Pin Functions ................................................................................................ 296

Figure 9.3

Port 4 Pin Functions ................................................................................................ 304

Figure 9.4

Port 7 Pin Functions ................................................................................................ 308

Figure 9.5

Port 9 Pin Functions ................................................................................................ 314

Figure 9.6

Port A Pin Functions ............................................................................................... 315

Figure 9.7

Port B Pin Functions ............................................................................................... 322

Figure 9.8

Port C Pin Functions ............................................................................................... 330

Figure 9.9

Port C Pin Functions (Modes 4 and 5) .................................................................... 333

Figure 9.10 Port C Pin Functions (Mode 6)................................................................................ 334

Figure 9.11 Port C Pin Functions (Mode 7)................................................................................ 335

Figure 9.12 Port D Pin Functions ............................................................................................... 337

Figure 9.13 Port D Pin Functions (Modes 4 to 6)....................................................................... 340

Figure 9.14 Port D Pin Functions (Mode 7) ............................................................................... 341

Figure 9.15 Port E Pin Functions................................................................................................ 342

Figure 9.16 Port E Pin Functions (Modes 4 to 6) ....................................................................... 345

Figure 9.17 Port E Pin Functions (Mode 7)................................................................................ 346

Figure 9.18 Port F Pin Functions................................................................................................ 348

Figure 9.19 Port G Pin Functions ............................................................................................... 353

Section 10 16-Bit Timer Pulse Unit (TPU)

Figure 10.1 Block Diagram of TPU ........................................................................................... 363

Figure 10.2 16-Bit Register Access Operation [Bus Master

↔ TCNT (16 Bits)]...................... 389

Figure 10.3 8-Bit Register Access Operation [Bus Master

↔ TCR (Upper 8 Bits)].................. 390

Figure 10.4 8-Bit Register Access Operation [Bus Master

↔ TMDR (Lower 8 Bits)] ............. 390

Figure 10.5 8-Bit Register Access Operation [Bus Master

↔ TCR and TMDR (16 Bits)] ....... 390

Figure 10.6 Example of Counter Operation Setting Procedure .................................................. 392

Figure 10.7 Free-Running Counter Operation ............................................................................ 393

Figure 10.8 Periodic Counter Operation..................................................................................... 394

Figure 10.9 Example Of Setting Procedure For Waveform Output By Compare Match ........... 395

Figure 10.10 Example of 0 Output/1 Output Operation ............................................................... 396

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