H8SSLASH2214 datasheet(53/936 Pages) RENESAS

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Rev.4.00 Sep. 18, 2008 Page liii of lx

REJ09B0189-0400

Figure 18.10 Burst ROM Access Timing/Two-State Access ....................................................... 651

Figure 18.11 External Bus Release Timing .................................................................................. 652

Figure 18.12 I/O Port Input/Output Timing.................................................................................. 654

Figure 18.13 TPU Input/Output Timing ....................................................................................... 654

Figure 18.14 TPU Clock Input Timing......................................................................................... 654

Figure 18.15 SCK Clock Input Timing ........................................................................................ 655

Figure 18.16 SCI Input/Output Timing/Clock Synchronous Mode.............................................. 655

Figure 18.17 DMAC

TEND Output Timing................................................................................. 656

Figure 18.18 DMAC

DREQ Output Timing ................................................................................ 656

Appendix A Instruction Set

Figure A.1

Address Bus,

RD, HWR, and LWR Timing

(8-Bit Bus, Three-State Access, No Wait States) .................................................... 718

Appendix C I/O Port Block Diagrams

Figure C.1

Port 1 Block Diagram (Pins P10 and P11) .............................................................. 827

Figure C.2

Port 1 Block Diagram (Pins P12 and P13) .............................................................. 828

Figure C.3

Port 1 Block Diagram (Pins P14 and P16) .............................................................. 829

Figure C.4

Port 1 Block Diagram (Pins P15 and P17) .............................................................. 830

Figure C.5

Port 3 Block Diagram (Pins P30 and P33) .............................................................. 831

Figure C.6

Port 3 Block Diagram (Pins P31 and P34) .............................................................. 832

Figure C.7

Port 3 Block Diagram (Pins P32 and P35) .............................................................. 833

Figure C.8

Port 3 Block Diagram (Pin P36).............................................................................. 834

Figure C.9

Port 4 Block Diagram (Pins P40 to P44, P46, and P47).......................................... 835

Figure C.10 Port 4 Block Diagram (Pin P45).............................................................................. 835

Figure C.11 Port 7 Block Diagram (Pins P70 and P71) .............................................................. 836

Figure C.12 Port 7 Block Diagram (Pins P72 and P73) .............................................................. 837

Figure C.13 Port 7 Block Diagram (Pin P74).............................................................................. 838

Figure C.14 Port 7 Block Diagram (Pins P75 and P76) .............................................................. 839

Figure C.15 Port 7 Block Diagram (Pin P77).............................................................................. 840

Figure C.16 Port 9 Block Diagram (Pin P96).............................................................................. 841

Figure C.17 Port A Block Diagram (Pin PA0) ............................................................................ 842

Figure C.18 Port A Block Diagram (Pin PA1) ............................................................................ 843

Figure C.19 Port A Block Diagram (Pin PA2) ............................................................................ 844

Figure C.20 Port A Block Diagram (Pin PA3) ............................................................................ 845

Figure C.21 Port B Block Diagram (Pins PB0 to PB7) ............................................................... 846

Figure C.22 Port C Block Diagram (Pins PC0 to PC7) ............................................................... 847

Figure C.23 Port D Block Diagram (Pins PD0 to PD7) .............................................................. 848

Figure C.24 Port E Block Diagram (Pins PE0 to PE7)................................................................ 849

Figure C.25 Port F Block Diagram (Pin PF0) ............................................................................. 850

Figure C.26 Port F Block Diagram (Pin PF1) ............................................................................. 851

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