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H8S/2214 数据表(PDF) 82 Page - Renesas Technology Corp

部件名 H8S/2214
功能描述  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  936 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8S/2214 数据表(HTML) 82 Page - Renesas Technology Corp

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Section 2 CPU
Rev.4.00 Sep. 18, 2008 Page 22 of 872
REJ09B0189-0400
(e) Stack Structure
When the program counter (PC) is pushed onto the stack in a subroutine call, and the PC,
condition-code register (CCR), and extended control register (EXR) are pushed onto the stack in
exception handling, they are stored as shown in figure 2.3. When EXR is invalid, it is not pushed
onto the stack. For details, see section 4, Exception Handling.
(a) Subroutine Branch
(b) Exception Handling
PC
(16 bits)
EXR*1
Reserved*1 *3
CCR
CCR*3
PC
(16 bits)
SP
SP
Notes: 1.
2.
3.
When EXR is not used it is not stored on the stack.
SP when EXR is not used.
Ignored when returning.
(SP
)
*2
Figure 2.3 Stack Structure in Normal Mode
(2) Advanced Mode
(a) Address Space
Linear access is provided to a 16-Mbyte maximum address space (architecturally a maximum 16-
Mbyte program area and a maximum 4-Gbyte data area, with a maximum of 4 Gbytes for program
and data areas combined).
(b) Extended Registers (En)
The extended registers (E0 to E7) can be used as 16-bit registers, or as the upper 16-bit segments
of 32-bit registers or address registers.
(c) Instruction Set
All instructions and addressing modes can be used.



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