H8SSLASH2214 datasheet(26/936 Pages) RENESAS

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Rev.4.00 Sep. 18, 2008 Page xxvi of lx

REJ09B0189-0400

Item

Page

Revisions (See Manual for Details)

B.2 Functions

TCR2—Timer

Control Register 2

791

Description added

Clock Edge 1 and 0

Count at rising edge

Count at falling edge

Count at both edges

Note: The internal clock edge selection is valid when the input clock is

φ/4 or slower. This setting is ignored if the input clock is φ/1, or

when overflow/underflow of another channel is selected.

(Counting occurs on the falling edge of

φ when φ/1 is selected.)

—

TCSR0—Timer

Control/Status

801

Note added

OVF

R/(W)*1

WT/

R/W

TME

R/W

—

CKS0

R/W

CKS2

R/W

CKS1

R/W

Bit

Initial value

Read/Write

Notes: 1.

Only 0 can be written, to clear the flag.

TCSR is write-protected by a password to prevent accidental overwriting. For details

see section 11.2.4, Notes on Register Access.

If the interval timer interrupt is disabled and the OVF flag is polled, the application

should read the OVF = 1 state at least twice.

Note: * For details of the case where TCNT overflows in watchdog timer mode,

see section 11.2.3, Reset Control/Status Register (RSTCSR).

Note: * The overflow period is the time from when TCNT

starts counting up from H'00 until overflow occurs.

Timer Enable

TCNT is initialized to H'00 and

count operation is halted

TCNT counts

Timer Mode Select

Interval timer mode: Interval timer interrupt (WOVI) request is sent to CPU when

TCNT overflows

Watchdog timer mode: Internal reset can be selected when TCNT overflows*

Overflow Flag

[Clearing condition]

• Cleared by reading*

2 TCSR when OVF = 1, then writing 0 to OVF

[Setting condition]

• When TCNT overflows (changes from H'FF to H'00)

When internal reset request generation is selected in watchdog

timer mode, OVF is cleared automatically by the internal reset.

Clock Select 2 to 0

Clock

Overflow Period*

(when

φ = 10 MHz)

φ/2 (Initial value)

51.2 µs

φ/64

1.6 ms

φ/128

3.2 ms

φ/512

13.2 ms

φ/2048

52.4 ms

φ/8192

209.8 ms

φ/32768

838.8 ms

φ/131072

3.36 s

CKS2 CKS1 CKS0

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