H8SSLASH2214 datasheet(55/936 Pages) RENESAS

55 / 936 page

Rev.4.00 Sep. 18, 2008 Page lv of lx

REJ09B0189-0400

Tables

Section 1 Overview

Table 1.1

Overview ..................................................................................................................... 2

Table 1.2

Pin Functions in Each Operating Mode....................................................................... 8

Table 1.3

Pin Functions............................................................................................................. 12

Section 2 CPU

Table 2.1

Instruction Classification........................................................................................... 34

Table 2.2

Combinations of Instructions and Addressing Modes............................................... 35

Table 2.3

Instructions Classified by Function ........................................................................... 38

Table 2.4

Addressing Modes..................................................................................................... 49

Table 2.5

Absolute Address Access Ranges ............................................................................. 50

Table 2.6

Effective Address Calculation................................................................................... 53

Table 2.7

Exception Handling Types and Priority .................................................................... 58

Section 3 MCU Operating Modes

Table 3.1

MCU Operating Mode Selection............................................................................... 71

Table 3.2

MCU Registers .......................................................................................................... 72

Table 3.3

Relationship between

RES and MRES pin Values and Type of Reset...................... 74

Table 3.4

Pin Functions in Each Mode...................................................................................... 77

Section 4 Exception Handling

Table 4.1

Exception Handling Types and Priority .................................................................... 79

Table 4.2

Exception Vector Table............................................................................................. 81

Table 4.3

Reset Types ............................................................................................................... 82

Table 4.4

Status of CCR and EXR after Trace Exception Handling ......................................... 86

Table 4.5

Status of CCR and EXR after Trap Instruction Exception Handling ........................ 88

Section 5 Interrupt Controller

Table 5.1

Interrupt Controller Pins............................................................................................ 93

Table 5.2

Interrupt Controller Registers.................................................................................... 93

Table 5.3

Correspondence between Interrupt Sources and IPR Settings................................... 95

Table 5.4

Interrupt Sources, Vector Addresses, and Interrupt Priorities ................................. 102

Table 5.5

Interrupt Control Modes .......................................................................................... 104

Table 5.6

Interrupts Selected in Each Interrupt Control Mode (1) .......................................... 105

Table 5.7

Interrupts Selected in Each Interrupt Control Mode (2) .......................................... 106

Table 5.8

Operations and Control Signal Functions in Each Interrupt Control Mode ............ 106

Table 5.9

Interrupt Response Times........................................................................................ 112

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