H8SSLASH2214 datasheet(60/936 Pages) RENESAS

60 / 936 page

Rev.4.00 Sep. 18, 2008 Page lx of lx

REJ09B0189-0400

Table 18.10 DMAC Timing ........................................................................................................ 656

Table 18.11 D/A Conversion Characteristics .............................................................................. 657

Table 18.12 Flash Memory Characteristics................................................................................. 658

Appendix A Instruction Set

Table A.1

Data Transfer Instructions ....................................................................................... 663

Table A.2

Arithmetic Instructions............................................................................................ 666

Table A.3

Logical Instructions................................................................................................. 670

Table A.4

Shift Instructions ..................................................................................................... 671

Table A.5

Bit-Manipulation Instructions ................................................................................. 674

Table A.6

Branch Instructions ................................................................................................. 679

Table A.7

System Control Instructions .................................................................................... 682

Table A.8

Block Transfer Instructions ..................................................................................... 684

Table A.9

Instruction Codes..................................................................................................... 685

Table A.10 Operation Code Map (1) ......................................................................................... 699

Table A.11 Operation Code Map (2) ......................................................................................... 700

Table A.12 Operation Code Map (3) ......................................................................................... 701

Table A.13 Operation Code Map (4) ......................................................................................... 702

Table A.14 Number of States per Cycle..................................................................................... 704

Table A.15 Number of Cycles in Instruction Execution ............................................................ 705

Table A.16 Instruction Execution Cycles................................................................................... 719

Table A.17 Condition Code Modification.................................................................................. 732

Appendix D Pin States

Table D.1

I/O Port States in Each Processing State ................................................................. 861

Appendix F Product Code Lineup

Table F.1

H8S/2214 Product Code Lineup.............................................................................. 867

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