H8SSLASH2214 datasheet(419/936 Pages) RENESAS

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Section 10 16-Bit Timer Pulse Unit (TPU)

Rev.4.00 Sep. 18, 2008 Page 359 of 872

REJ09B0189-0400

Section 10 16-Bit Timer Pulse Unit (TPU)

10.1

Overview

The H8S/2214 Group has an on-chip 16-bit timer pulse unit (TPU) comprising three 16-bit timer

channels.

10.1.1

Features

• Can input/output a maximum of 8 pulses

⎯ A total of 8 timer general registers (TGRs) are provided (four each for channel 0, and two

each for channels 1 and 2), each of which can be set independently as an output

compare/input capture register

⎯ TGRC and TGRD for channel 0 can also be used as buffer registers

• Selection of 8 counter input clocks for each channel

• The following operations can be set for each channel:

⎯ Waveform output at compare match: Selection of 0, 1, or toggle output

⎯ Input capture function: Selection of rising edge, falling edge, or both edge detection

⎯ Counter clear operation: Counter clearing possible by compare match or input capture

⎯ Synchronous operation: Multiple timer counters (TCNT) can be written to simultaneously

Simultaneous clearing by compare match and input capture possible

⎯ PWM mode: Any PWM output duty can be set

Maximum of 7-phase PWM output possible by combination with synchronous operation

• Buffer operation settable for channel 0

⎯ Input capture register double-buffering possible

⎯ Automatic rewriting of output compare register possible

• Phase counting mode settable independently for each of channels 1 and 2

⎯ Two-phase encoder pulse up/down-count possible

• SCI0 baud rate clock generation by channels 1 and 2

⎯ An SCI0 baud rate clock can be generated using an AND circuit for TIOCA1 output and

TIOCA2 output

• Fast access via internal 16-bit bus

⎯ Fast access is possible via a 16-bit bus interface

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